Added short explanation of the BRD calculations for setting up UART re #70

06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs

@@ -174,8 +174,12 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// Results in 8N1 and 230400 baud (if the clk has been previously set to 48 MHz by the
-    /// firmware).
+    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
+    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
+    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
+    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    ///
+    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);

07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs

@@ -174,8 +174,12 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// Results in 8N1 and 230400 baud (if the clk has been previously set to 48 MHz by the
-    /// firmware).
+    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
+    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
+    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
+    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    ///
+    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);

08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs

@@ -174,8 +174,12 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// Results in 8N1 and 230400 baud (if the clk has been previously set to 48 MHz by the
-    /// firmware).
+    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
+    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
+    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
+    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    ///
+    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);

09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs

@@ -174,8 +174,12 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// Results in 8N1 and 230400 baud (if the clk has been previously set to 48 MHz by the
-    /// firmware).
+    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
+    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
+    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
+    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    ///
+    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);

10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs

@@ -174,8 +174,12 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// Results in 8N1 and 230400 baud (if the clk has been previously set to 48 MHz by the
-    /// firmware).
+    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
+    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
+    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
+    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    ///
+    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);

11_virtual_memory/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs

@@ -174,8 +174,12 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// Results in 8N1 and 230400 baud (if the clk has been previously set to 48 MHz by the
-    /// firmware).
+    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
+    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
+    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
+    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    ///
+    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);

12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs

@@ -174,8 +174,12 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// Results in 8N1 and 230400 baud (if the clk has been previously set to 48 MHz by the
-    /// firmware).
+    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
+    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
+    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
+    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    ///
+    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);

13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs

@@ -174,8 +174,12 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// Results in 8N1 and 230400 baud (if the clk has been previously set to 48 MHz by the
-    /// firmware).
+    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
+    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
+    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
+    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    ///
+    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);

14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs

@@ -226,8 +226,12 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// Results in 8N1 and 230400 baud (if the clk has been previously set to 48 MHz by the
-    /// firmware).
+    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
+    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
+    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
+    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    ///
+    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);

X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs

@@ -174,8 +174,12 @@ impl PL011UartInner {
 
     /// Set up baud rate and characteristics.
     ///
-    /// Results in 8N1 and 230400 baud (if the clk has been previously set to 48 MHz by the
-    /// firmware).
+    /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
+    /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
+    /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
+    /// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
+    ///
+    /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
     pub fn init(&mut self) {
         // Turn it off temporarily.
         self.registers.CR.set(0);