Introduce abstraction tut, shuffle tut numbers again
Andre Richter
6 years ago
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09d36953a0
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1b046df046
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# Tutorial 07 - Abstraction
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This is a short one regarding code changes, but has lots of text because two
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important Rust principles are introduced: Abstraction and modularity.
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From a functional perspective, this tutorial is the same as `05_uart0`, but with
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the key difference that we threw out all manually crafted assembler. Both the
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main and the glue crate do not use `#![feature(global_asm)]` or
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`#![feature(asm)]` anymore. Instead, we pulled in the [cortex-a][crate] crate,
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which now provides `cortex-a` specific features like register access or safe
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wrappers around assembly instructions.
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[crate]: https://github.com/andre-richter/cortex-a
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For single assembler instructions, we now have the `cortex-a::asm` namespace,
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e.g. providing `asm::nop()`.
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For registers, there is `cortex-a::register`. For registers like the stack
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pointer, which are generally read and written as a whole, there's simple
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[read()][sp_read] and [write()][sp_write] functions which take and return
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primitive integer types.
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[sp_read]: https://docs.rs/cortex-a/0.1.2/cortex_a/register/sp/fn.read.html
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[sp_write]: https://docs.rs/cortex-a/0.1.2/cortex_a/register/sp/fn.write.html
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Registers that are divided into multiple fields, e.g. `MPIDR_EL1` ([see the ARM
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Reference Manual][el1]), on the other hand, are abstracted into their [own
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types][mpidr_type] and offer getter and/or setter methods, respectively.
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[el1]: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0500g/BABHBJCI.html
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[mpidr_type]:https://docs.rs/cortex-a/0.1.2/cortex_a/register/mpidr_el1/struct.MPIDR_EL1.html
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To some extent, this namespacing also makes our code more portable. For example,
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if we want to reuse parts of it on another processor architecture, we could pull
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in the respective crate and change our use-clause from `use cortex-a::asm` to
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`use new_architecture::asm`. Of course this also demands that both crates adhere
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to a common set of wrappers that provide the same functionality. Assembler and
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register instructions like we use them here are actually a weak example. Where
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this modular approach can really pay off is for common peripherals like timers
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or memory management units, where implementations differ between processors, but
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usage is often the same (e.g. setting a timer for x amount of microseconds).
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In Rust, we have the [Embedded Devices Working
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Group](https://github.com/rust-lang-nursery/embedded-wg), which among other
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goals, tries to establish a common set of wrapper- and interface-crates that
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introduce abstraction on different levels of the system. Check out the [Awesome
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Embedded Rust](https://github.com/rust-embedded/awesome-embedded-rust) list for
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an overview.
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## Glue Code
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Like mentioned above, we threw out the `boot_cores.S` assembler file and
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replaced it with a Rust function. Why? Because we can, for the fun of it.
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```rust
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#[link_section = ".text.boot"]
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#[no_mangle]
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pub extern "C" fn _boot_cores() -> ! {
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match register::mpidr_el1::read().core_id() {
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0 => unsafe {
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register::sp::write(0x80_000);
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reset()
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},
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_ => loop {
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// if not core0, infinitely wait for events
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asm::wfe();
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},
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}
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}
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```
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Since this is the first code that the RPi3 will execute, the stack has not been
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set up yet. Actually it is this function that will do it for the first
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time. Therefore, it is important to check that code generated from this function
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does not call any subroutines that need a working stack themselves.
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The `register` and `asm` wrappers that we use from the `cortex-a` crate are all
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inlined, so we fulfill this requirement. The compilation result of this function
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should yield something like the following, where you can see that the stack
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pointer is not used apart from ourselves setting it.
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```bash
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./dockcross-linux-aarch64 bash
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[andre:/work] $ aarch64-linux-gnu-objdump -CD kernel8
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[...] (Some output omitted)
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0000000000080000 <_boot_cores>:
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80000: d53800a8 mrs x8, mpidr_el1
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80004: f240051f tst x8, #0x3
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80008: 54000060 b.eq 80014 <_boot_cores+0x14>
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8000c: d503205f wfe
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80010: 17ffffff b 8000c <_boot_cores+0xc>
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80014: 320d03e8 orr w8, wzr, #0x80000
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80018: 9100011f mov sp, x8
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8001c: 9400016b bl 805c8 <raspi3_glue::reset::h2a7ad49cd9d2154d>
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```
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It is important to always manually check this, and not blindly rely on the
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compiler.
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## Test it
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Since this is the first tutorial after we've written our own bootloader over
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serial, you can now for the first time test this convenient interface:
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```bash
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make raspboot
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```
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Binary file not shown.
@ -0,0 +1,85 @@
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/*
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* MIT License
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*
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* Copyright (c) 2018 Andre Richter <andre.o.richter@gmail.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
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* copies of the Software, and to permit persons to whom the Software is
|
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#![no_std]
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extern crate cortex_a;
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extern crate raspi3_glue;
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extern crate volatile_register;
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const MMIO_BASE: u32 = 0x3F00_0000;
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mod gpio;
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mod mbox;
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mod uart;
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use core::sync::atomic::{compiler_fence, Ordering};
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fn main() {
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let mut mbox = mbox::Mbox::new();
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let uart = uart::Uart::new();
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// set up serial console
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if uart.init(&mut mbox).is_err() {
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return; // If UART fails, abort early
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}
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// get the board's unique serial number with a mailbox call
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mbox.buffer[0] = 8 * 4; // length of the message
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mbox.buffer[1] = mbox::REQUEST; // this is a request message
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mbox.buffer[2] = mbox::tag::GETSERIAL; // get serial number command
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mbox.buffer[3] = 8; // buffer size
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mbox.buffer[4] = 8;
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mbox.buffer[5] = 0; // clear output buffer
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mbox.buffer[6] = 0;
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mbox.buffer[7] = mbox::tag::LAST;
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// Insert a compiler fence that ensures that all stores to the
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// mbox buffer are finished before the GPU is signaled (which is
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// done by a store operation as well).
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compiler_fence(Ordering::Release);
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// send the message to the GPU and receive answer
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let serial_avail = match mbox.call(mbox::channel::PROP) {
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Err(_) => false,
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Ok(()) => true,
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};
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uart.getc(); // Press a key first before being greeted
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uart.puts("Hello Rustacean!\n");
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if serial_avail {
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uart.puts("My serial number is: ");
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uart.hex(mbox.buffer[6]);
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uart.hex(mbox.buffer[5]);
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uart.puts("\n");
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} else {
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uart.puts("Unable to query serial!\n");
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}
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// echo everything back
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loop {
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uart.send(uart.getc());
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}
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}
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@ -0,0 +1,52 @@
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[[package]]
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name = "cortex-a"
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version = "0.1.2"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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[[package]]
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name = "kernel8"
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version = "0.1.0"
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dependencies = [
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"cortex-a 0.1.2 (registry+https://github.com/rust-lang/crates.io-index)",
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"raspi3_glue 0.1.0",
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"volatile-register 0.2.0 (registry+https://github.com/rust-lang/crates.io-index)",
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]
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[[package]]
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name = "panic-abort"
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version = "0.1.1"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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[[package]]
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name = "r0"
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version = "0.2.2"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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[[package]]
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name = "raspi3_glue"
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version = "0.1.0"
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dependencies = [
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"cortex-a 0.1.2 (registry+https://github.com/rust-lang/crates.io-index)",
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"panic-abort 0.1.1 (registry+https://github.com/rust-lang/crates.io-index)",
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"r0 0.2.2 (registry+https://github.com/rust-lang/crates.io-index)",
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]
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[[package]]
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name = "vcell"
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version = "0.1.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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[[package]]
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name = "volatile-register"
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version = "0.2.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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dependencies = [
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"vcell 0.1.0 (registry+https://github.com/rust-lang/crates.io-index)",
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]
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[metadata]
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"checksum cortex-a 0.1.2 (registry+https://github.com/rust-lang/crates.io-index)" = "7a659ffa30a45a5a05970bb3419796563b6517c03bb68950e7ab4c65dad94680"
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"checksum panic-abort 0.1.1 (registry+https://github.com/rust-lang/crates.io-index)" = "75553c30311427a2d9f24a646fc8cedb00e1da1c6bd1608d71d634184c60392e"
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"checksum r0 0.2.2 (registry+https://github.com/rust-lang/crates.io-index)" = "e2a38df5b15c8d5c7e8654189744d8e396bddc18ad48041a500ce52d6948941f"
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"checksum vcell 0.1.0 (registry+https://github.com/rust-lang/crates.io-index)" = "45c297f0afb6928cd08ab1ff9d95e99392595ea25ae1b5ecf822ff8764e57a0d"
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"checksum volatile-register 0.2.0 (registry+https://github.com/rust-lang/crates.io-index)" = "0d67cb4616d99b940db1d6bd28844ff97108b498a6ca850e5b6191a532063286"
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@ -0,0 +1,9 @@
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[package]
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name = "kernel8"
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version = "0.1.0"
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authors = ["Andre Richter <andre.o.richter@gmail.com>"]
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[dependencies]
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raspi3_glue = { path = "raspi3_glue" }
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cortex-a = "0.1.2"
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volatile-register = "0.2.0"
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@ -0,0 +1,72 @@
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#
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# MIT License
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#
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# Copyright (c) 2018 Andre Richter <andre.o.richter@gmail.com>
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#
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# Permission is hereby granted, free of charge, to any person obtaining a copy
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# of this software and associated documentation files (the "Software"), to deal
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# in the Software without restriction, including without limitation the rights
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# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
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# copies of the Software, and to permit persons to whom the Software is
|
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# furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice shall be included in all
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# copies or substantial portions of the Software.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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# SOFTWARE.
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#
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TARGET = aarch64-raspi3-none-elf
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CROSS_CONTAINER = ./dockcross-linux-aarch64
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CROSS_CONTAINER_OBJCOPY = aarch64-linux-gnu-objcopy
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UTILS_CONTAINER = andrerichter/raspi3-utils
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DOCKER_CMD = docker run -it --rm -v $(shell pwd):/work -w /work
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DOCKER_TTY = --privileged -v /dev:/dev
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QEMU_CMD = qemu-system-aarch64 -M raspi3 -kernel kernel8.img
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RASPBOOT_CMD = raspbootcom /dev/ttyUSB0 kernel8.img
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all: clean cross_cont_download kernel8.img
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cross_cont_download:
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ifeq (,$(wildcard $(CROSS_CONTAINER)))
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docker run --rm dockcross/linux-arm64 > $(CROSS_CONTAINER)
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chmod +x $(CROSS_CONTAINER)
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endif
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target/$(TARGET)/debug/kernel8: src/main.rs
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RUST_TARGET_PATH=$(shell pwd) xargo build --target=$(TARGET)
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cp $@ .
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target/$(TARGET)/release/kernel8: src/main.rs
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RUST_TARGET_PATH=$(shell pwd) xargo build --target=$(TARGET) --release
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cp $@ .
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ifeq ($(DEBUG),1)
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kernel8: target/$(TARGET)/debug/kernel8
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else
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kernel8: target/$(TARGET)/release/kernel8
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endif
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kernel8.img: kernel8
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$(CROSS_CONTAINER) $(CROSS_CONTAINER_OBJCOPY) -O binary -S $< kernel8.img
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qemu:
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$(DOCKER_CMD) $(UTILS_CONTAINER) $(QEMU_CMD) -serial stdio
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raspboot:
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$(DOCKER_CMD) $(DOCKER_TTY) $(UTILS_CONTAINER) $(RASPBOOT_CMD)
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clippy:
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RUSTFLAGS="-C panic=abort" xargo clippy
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clean:
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cargo clean
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rm -f kernel8
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@ -1,4 +1,4 @@
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# Tutorial 07 - Hardware Random Number Generator
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# Tutorial 08 - Hardware Random Number Generator
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This going to be an easy tutorial. We query a number from the (undocumented)
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hardware random number generator. You can use this to implement a simple, but
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@ -0,0 +1,32 @@
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{
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"arch": "aarch64",
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"data-layout": "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128",
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"executables": true,
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"linker-flavor": "ld.lld",
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"linker-is-gnu": true,
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"pre-link-args": {
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"ld.lld": [
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"--script=link.ld"
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]
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},
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"llvm-target": "aarch64-unknown-none",
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"no-compiler-rt": true,
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"features": "+a53,+strict-align",
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"max-atomic-width": 128,
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"os": "none",
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"panic": "abort",
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"panic-strategy": "abort",
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"relocation-model": "pic",
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"target-c-int-width": "32",
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"target-endian": "little",
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"target-pointer-width": "64",
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"disable-redzone": true,
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"abi-blacklist": [
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"stdcall",
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"fastcall",
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"vectorcall",
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"thiscall",
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"win64",
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"sysv64"
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]
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}
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Binary file not shown.
@ -0,0 +1,9 @@
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[package]
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name = "raspi3_glue"
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version = "0.1.0"
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authors = ["Andre Richter <andre.o.richter@gmail.com>"]
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[dependencies]
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cortex-a = "0.1.2"
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panic-abort = "0.1.1"
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r0 = "0.2.2"
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@ -0,0 +1,90 @@
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/*
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* MIT License
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*
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* Copyright (c) 2018 Jorge Aparicio
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* Copyright (c) 2018 Andre Richter <andre.o.richter@gmail.com>
|
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*
|
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* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*/
|
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#![feature(lang_items)]
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#![no_std]
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extern crate cortex_a;
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extern crate panic_abort;
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extern crate r0;
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use core::ptr;
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use cortex_a::{asm, register};
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#[lang = "start"]
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extern "C" fn start<T>(user_main: fn() -> T, _argc: isize, _argv: *const *const u8) -> isize
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where
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T: Termination,
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{
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user_main().report() as isize
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}
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#[lang = "termination"]
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trait Termination {
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fn report(self) -> i32;
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||||
}
|
||||
|
||||
impl Termination for () {
|
||||
fn report(self) -> i32 {
|
||||
0
|
||||
}
|
||||
}
|
||||
|
||||
unsafe fn reset() -> ! {
|
||||
extern "C" {
|
||||
fn main(argc: isize, argv: *const *const u8) -> isize;
|
||||
|
||||
// Boundaries of the .bss section
|
||||
static mut __bss_start: u32;
|
||||
static mut __bss_end: u32;
|
||||
}
|
||||
|
||||
// Zeroes the .bss section
|
||||
r0::zero_bss(&mut __bss_start, &mut __bss_end);
|
||||
|
||||
main(0, ptr::null());
|
||||
|
||||
loop {}
|
||||
}
|
||||
|
||||
/// Entrypoint of the RPi3.
|
||||
///
|
||||
/// Parks all cores except core0, and then jumps to the internal
|
||||
/// `reset()` function, which will call the user's `main()` after
|
||||
/// initializing the `bss` section.
|
||||
#[link_section = ".text.boot"]
|
||||
#[no_mangle]
|
||||
pub extern "C" fn _boot_cores() -> ! {
|
||||
match register::mpidr_el1::read().core_id() {
|
||||
0 => unsafe {
|
||||
register::sp::write(0x80_000);
|
||||
reset()
|
||||
},
|
||||
_ => loop {
|
||||
// if not core0, infinitely wait for events
|
||||
asm::wfe();
|
||||
},
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,30 @@
|
||||
/*
|
||||
* MIT License
|
||||
*
|
||||
* Copyright (c) 2018 Andre Richter <andre.o.richter@gmail.com>
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*/
|
||||
|
||||
use super::MMIO_BASE;
|
||||
use volatile_register::RW;
|
||||
|
||||
pub const GPFSEL1: *const RW<u32> = (MMIO_BASE + 0x0020_0004) as *const RW<u32>;
|
||||
pub const GPPUD: *const RW<u32> = (MMIO_BASE + 0x0020_0094) as *const RW<u32>;
|
||||
pub const GPPUDCLK0: *const RW<u32> = (MMIO_BASE + 0x0020_0098) as *const RW<u32>;
|
||||
@ -0,0 +1,138 @@
|
||||
/*
|
||||
* MIT License
|
||||
*
|
||||
* Copyright (c) 2018 Andre Richter <andre.o.richter@gmail.com>
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*/
|
||||
|
||||
use super::MMIO_BASE;
|
||||
use cortex_a::asm;
|
||||
use volatile_register::{RO, WO};
|
||||
|
||||
const VIDEOCORE_MBOX: u32 = MMIO_BASE + 0xB880;
|
||||
|
||||
#[allow(non_snake_case)]
|
||||
#[repr(C)]
|
||||
struct Registers {
|
||||
READ: RO<u32>, // 0x00
|
||||
__reserved_0: [u32; 3], // 0x04
|
||||
POLL: RO<u32>, // 0x10
|
||||
SENDER: RO<u32>, // 0x14
|
||||
STATUS: RO<u32>, // 0x18
|
||||
CONFIG: RO<u32>, // 0x1C
|
||||
WRITE: WO<u32>, // 0x20
|
||||
}
|
||||
|
||||
// Custom errors
|
||||
pub enum MboxError {
|
||||
ResponseError,
|
||||
UnknownError,
|
||||
}
|
||||
pub type Result<T> = ::core::result::Result<T, MboxError>;
|
||||
|
||||
// Channels
|
||||
pub mod channel {
|
||||
pub const PROP: u32 = 8;
|
||||
}
|
||||
|
||||
// Tags
|
||||
pub mod tag {
|
||||
pub const SETCLKRATE: u32 = 0x38002;
|
||||
pub const LAST: u32 = 0;
|
||||
}
|
||||
|
||||
// Clocks
|
||||
pub mod clock {
|
||||
pub const UART: u32 = 0x0_0000_0002;
|
||||
}
|
||||
|
||||
// Responses
|
||||
mod response {
|
||||
pub const SUCCESS: u32 = 0x8000_0000;
|
||||
pub const ERROR: u32 = 0x8000_0001; // error parsing request buffer (partial response)
|
||||
}
|
||||
|
||||
pub const REQUEST: u32 = 0;
|
||||
const FULL: u32 = 0x8000_0000;
|
||||
const EMPTY: u32 = 0x4000_0000;
|
||||
|
||||
// Public interface to the mailbox
|
||||
#[repr(C)]
|
||||
pub struct Mbox {
|
||||
// The address for buffer needs to be 16-byte aligned so that the
|
||||
// Videcore can handle it properly. We don't take precautions here
|
||||
// to achieve that, but for now it just works. Since alignment of
|
||||
// data structures in Rust is a bit of a hassle right now, we just
|
||||
// close our eyes and roll with it.
|
||||
pub buffer: [u32; 36],
|
||||
registers: *const Registers,
|
||||
}
|
||||
|
||||
impl Mbox {
|
||||
pub fn new() -> Mbox {
|
||||
Mbox {
|
||||
buffer: [0; 36],
|
||||
registers: VIDEOCORE_MBOX as *const Registers,
|
||||
}
|
||||
}
|
||||
|
||||
/// Make a mailbox call. Returns Err(MboxError) on failure, Ok(()) success
|
||||
pub fn call(&mut self, channel: u32) -> Result<()> {
|
||||
// wait until we can write to the mailbox
|
||||
loop {
|
||||
if (unsafe { (*self.registers).STATUS.read() } & FULL) != FULL {
|
||||
break;
|
||||
}
|
||||
|
||||
asm::nop();
|
||||
}
|
||||
|
||||
// write the address of our message to the mailbox with channel identifier
|
||||
unsafe {
|
||||
(*self.registers)
|
||||
.WRITE
|
||||
.write(((self.buffer.as_mut_ptr() as u32) & !0xF) | (channel & 0xF));
|
||||
}
|
||||
|
||||
// now wait for the response
|
||||
loop {
|
||||
// is there a response?
|
||||
loop {
|
||||
if (unsafe { (*self.registers).STATUS.read() } & EMPTY) != EMPTY {
|
||||
break;
|
||||
}
|
||||
|
||||
asm::nop();
|
||||
}
|
||||
|
||||
let resp: u32 = unsafe { (*self.registers).READ.read() };
|
||||
|
||||
// is it a response to our message?
|
||||
if ((resp & 0xF) == channel) && ((resp & !0xF) == (self.buffer.as_mut_ptr() as u32)) {
|
||||
// is it a valid successful response?
|
||||
return match self.buffer[1] {
|
||||
response::SUCCESS => Ok(()),
|
||||
response::ERROR => Err(MboxError::ResponseError),
|
||||
_ => Err(MboxError::UnknownError),
|
||||
};
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,191 @@
|
||||
/*
|
||||
* MIT License
|
||||
*
|
||||
* Copyright (c) 2018 Andre Richter <andre.o.richter@gmail.com>
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*/
|
||||
|
||||
use super::MMIO_BASE;
|
||||
use core::sync::atomic::{compiler_fence, Ordering};
|
||||
use cortex_a::asm;
|
||||
use gpio;
|
||||
use mbox;
|
||||
use volatile_register::*;
|
||||
|
||||
const UART_BASE: u32 = MMIO_BASE + 0x20_1000;
|
||||
|
||||
// PL011 UART registers
|
||||
#[allow(non_snake_case)]
|
||||
#[repr(C)]
|
||||
struct Registers {
|
||||
DR: RW<u32>, // 0x00
|
||||
__reserved_0: [u32; 5], // 0x04
|
||||
FR: RO<u32>, // 0x18
|
||||
__reserved_1: [u32; 2], // 0x1c
|
||||
IBRD: WO<u32>, // 0x24
|
||||
FBRD: WO<u32>, // 0x28
|
||||
LCRH: WO<u32>, // 0x2C
|
||||
CR: WO<u32>, // 0x30
|
||||
__reserved_2: [u32; 4], // 0x34
|
||||
ICR: WO<u32>, // 0x44
|
||||
}
|
||||
|
||||
pub enum UartError {
|
||||
MailboxError,
|
||||
}
|
||||
pub type Result<T> = ::core::result::Result<T, UartError>;
|
||||
|
||||
pub struct Uart {
|
||||
registers: *const Registers,
|
||||
}
|
||||
|
||||
impl Uart {
|
||||
pub fn new() -> Uart {
|
||||
Uart {
|
||||
registers: UART_BASE as *const Registers,
|
||||
}
|
||||
}
|
||||
|
||||
///Set baud rate and characteristics (115200 8N1) and map to GPIO
|
||||
pub fn init(&self, mbox: &mut mbox::Mbox) -> Result<()> {
|
||||
// turn off UART0
|
||||
unsafe { (*self.registers).CR.write(0) };
|
||||
|
||||
// set up clock for consistent divisor values
|
||||
mbox.buffer[0] = 9 * 4;
|
||||
mbox.buffer[1] = mbox::REQUEST;
|
||||
mbox.buffer[2] = mbox::tag::SETCLKRATE;
|
||||
mbox.buffer[3] = 12;
|
||||
mbox.buffer[4] = 8;
|
||||
mbox.buffer[5] = mbox::clock::UART; // UART clock
|
||||
mbox.buffer[6] = 4_000_000; // 4Mhz
|
||||
mbox.buffer[7] = 0; // skip turbo setting
|
||||
mbox.buffer[8] = mbox::tag::LAST;
|
||||
|
||||
// Insert a compiler fence that ensures that all stores to the
|
||||
// mbox buffer are finished before the GPU is signaled (which
|
||||
// is done by a store operation as well).
|
||||
compiler_fence(Ordering::Release);
|
||||
|
||||
if mbox.call(mbox::channel::PROP).is_err() {
|
||||
return Err(UartError::MailboxError); // Abort if UART clocks couldn't be set
|
||||
};
|
||||
|
||||
// map UART0 to GPIO pins
|
||||
unsafe {
|
||||
(*gpio::GPFSEL1).modify(|x| {
|
||||
// Modify with a closure
|
||||
let mut ret = x;
|
||||
ret &= !((7 << 12) | (7 << 15)); // gpio14, gpio15
|
||||
ret |= (4 << 12) | (4 << 15); // alt0
|
||||
|
||||
ret
|
||||
});
|
||||
|
||||
(*gpio::GPPUD).write(0); // enable pins 14 and 15
|
||||
for _ in 0..150 {
|
||||
asm::nop();
|
||||
}
|
||||
|
||||
(*gpio::GPPUDCLK0).write((1 << 14) | (1 << 15));
|
||||
for _ in 0..150 {
|
||||
asm::nop();
|
||||
}
|
||||
(*gpio::GPPUDCLK0).write(0);
|
||||
|
||||
(*self.registers).ICR.write(0x7FF); // clear interrupts
|
||||
(*self.registers).IBRD.write(2); // 115200 baud
|
||||
(*self.registers).FBRD.write(0xB);
|
||||
(*self.registers).LCRH.write(0b11 << 5); // 8n1
|
||||
(*self.registers).CR.write(0x301); // enable Tx, Rx, FIFO
|
||||
}
|
||||
|
||||
Ok(())
|
||||
}
|
||||
|
||||
/// Send a character
|
||||
pub fn send(&self, c: char) {
|
||||
// wait until we can send
|
||||
loop {
|
||||
if (unsafe { (*self.registers).FR.read() } & 0x20) != 0x20 {
|
||||
break;
|
||||
}
|
||||
|
||||
asm::nop();
|
||||
}
|
||||
|
||||
// write the character to the buffer
|
||||
unsafe { (*self.registers).DR.write(c as u32) };
|
||||
}
|
||||
|
||||
/// Receive a character
|
||||
pub fn getc(&self) -> char {
|
||||
// wait until something is in the buffer
|
||||
loop {
|
||||
if (unsafe { (*self.registers).FR.read() } & 0x10) != 0x10 {
|
||||
break;
|
||||
}
|
||||
|
||||
asm::nop();
|
||||
}
|
||||
|
||||
// read it and return
|
||||
let mut ret = unsafe { (*self.registers).DR.read() as u8 as char };
|
||||
|
||||
// convert carrige return to newline
|
||||
if ret == '\r' {
|
||||
ret = '\n'
|
||||
}
|
||||
|
||||
ret
|
||||
}
|
||||
|
||||
/// Display a string
|
||||
pub fn puts(&self, string: &str) {
|
||||
for c in string.chars() {
|
||||
// convert newline to carrige return + newline
|
||||
if c == '\n' {
|
||||
self.send('\r')
|
||||
}
|
||||
|
||||
self.send(c);
|
||||
}
|
||||
}
|
||||
|
||||
/// Display a binary value in hexadecimal
|
||||
pub fn hex(&self, d: u32) {
|
||||
let mut n;
|
||||
|
||||
for i in 0..8 {
|
||||
// get highest tetrad
|
||||
n = d.wrapping_shr(28 - i * 4) & 0xF;
|
||||
|
||||
// 0-9 => '0'-'9', 10-15 => 'A'-'F'
|
||||
// Add proper offset for ASCII table
|
||||
if n > 9 {
|
||||
n += 0x37;
|
||||
} else {
|
||||
n += 0x30;
|
||||
}
|
||||
|
||||
self.send(n as u8 as char);
|
||||
}
|
||||
}
|
||||
}
|
||||
Loading…
Reference in New Issue