01_wait_forever: support riscv32/HiFive1

01_wait_forever/Cargo.toml

@@ -9,5 +9,6 @@ edition = "2018"
 default = []
 bsp_rpi3 = []
 bsp_rpi4 = []
+bsp_hifive1 = []
 
 [dependencies]

01_wait_forever/Makefile

@@ -14,6 +14,8 @@ ifeq ($(BSP),rpi3)
     QEMU_RELEASE_ARGS = -d in_asm -display none
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a53
+	CPU_ARCH          = aarch64
+	DOCKER_IMAGE      = rustembedded/osdev-utils
 else ifeq ($(BSP),rpi4)
     TARGET            = aarch64-unknown-none-softfloat
     KERNEL_BIN        = kernel8.img
@@ -22,6 +24,19 @@ else ifeq ($(BSP),rpi4)
     QEMU_RELEASE_ARGS = -d in_asm -display none
     LINKER_FILE       = src/bsp/raspberrypi/link.ld
     RUSTC_MISC_ARGS   = -C target-cpu=cortex-a72
+	CPU_ARCH          = aarch64
+	DOCKER_IMAGE      = rustembedded/osdev-utils
+else ifeq ($(BSP),hifive1)
+    TARGET            = riscv32imac-unknown-none-elf
+    KERNEL_BIN        = kernel8.img
+    QEMU_BINARY       = qemu-system-riscv32
+    QEMU_MACHINE_TYPE = sifive_e
+    QEMU_RELEASE_ARGS = -d in_asm -display none -bios none
+    LINKER_FILE       = src/bsp/hifive1/link.ld
+    RUSTC_MISC_ARGS   = -C target-cpu=generic-rv32
+	CPU_ARCH          = riscv32
+	# Use its own image until rustembedded/osdev-utils supports riscv32.
+	DOCKER_IMAGE      = imsuten/osdev-utils
 endif
 
 # Export for build.rs
@@ -44,8 +59,7 @@ OBJCOPY_CMD = rust-objcopy \
 
 KERNEL_ELF = target/$(TARGET)/release/kernel
 
-DOCKER_IMAGE         = rustembedded/osdev-utils
-DOCKER_CMD           = docker run -it --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
+DOCKER_CMD = docker run -it --rm -v $(shell pwd):/work/tutorial -w /work/tutorial
 
 DOCKER_QEMU = $(DOCKER_CMD) $(DOCKER_IMAGE)
 
@@ -64,12 +78,15 @@ $(KERNEL_BIN): $(KERNEL_ELF)
 doc:
 	$(DOC_CMD) --document-private-items --open
 
-ifeq ($(QEMU_MACHINE_TYPE),)
-qemu:
-	@echo "This board is not yet supported for QEMU."
-else
+ifeq ($(BSP),rpi3)
 qemu: $(KERNEL_BIN)
 	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_BIN)
+else ifeq ($(BSP),rpi4)
+qemu:
+	@echo "This board is not yet supported for QEMU."
+else ifeq ($(BSP),hifive1)
+qemu: $(KERNEL_ELF)
+	@$(DOCKER_QEMU) $(EXEC_QEMU) $(QEMU_RELEASE_ARGS) -kernel $(KERNEL_ELF)
 endif
 
 clippy:
@@ -82,7 +99,7 @@ readelf: $(KERNEL_ELF)
 	readelf -a $(KERNEL_ELF)
 
 objdump: $(KERNEL_ELF)
-	rust-objdump --arch-name aarch64 --disassemble --demangle --no-show-raw-insn \
+	rust-objdump --arch-name $(CPU_ARCH) --disassemble --demangle --no-show-raw-insn \
 	    --print-imm-hex $(KERNEL_ELF)
 
 nm: $(KERNEL_ELF)

01_wait_forever/README.md

@@ -19,12 +19,11 @@ executing the kernel code.
 ## Code to look at
 
 - Custom `link.ld` linker script.
-    - Load address at `0x80_000`
+    - Load address at `0x80_000` for RPi and `0x20400000` for HiFive1.
     - Only `.text` section.
 - `main.rs`: Important [inner attributes]:
     - `#![no_std]`, `#![no_main]`
-- `cpu.S`: Assembly `_start()` function that executes `wfe` (Wait For Event), halting all cores that
-  are executing `_start()`.
+- `cpu.S`: Assembly `_start()` function that executes `wfe` (Wait For Event) for RPi and `wfi` (Wait For Interrupt) for HiFive1, halting all cores that are executing `_start()`.
 - We (have to) define a `#[panic_handler]` function.
     - Just waits infinitely for a cpu event.
 

01_wait_forever/src/_arch/riscv32/cpu.S

@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020 Ken Kawamoto <kentaro.kawamoto@gmail.com>
+
+.section ".text._start"
+
+.global _start
+
+_start:
+1:  wfi         // Wait for interrupt
+    j       1b  // In case an event happened, jump back to 1

01_wait_forever/src/_arch/riscv32/cpu.rs

@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020 Ken Kawamoto <kentaro.kawamoto@gmail.com>
+
+//! Architectural processor code.
+
+// Assembly counterpart to this file.
+global_asm!(include_str!("cpu.S"));
+
+//--------------------------------------------------------------------------------------------------
+// Public Code
+//--------------------------------------------------------------------------------------------------
+
+/// Pause execution on the core.
+#[inline(always)]
+pub fn wait_forever() -> ! {
+    unsafe {
+        loop {
+            llvm_asm!("wfi"
+                    :             // outputs
+                    :             // inputs
+                    :             // clobbers
+                    : "volatile") // options
+        }
+    }
+}

01_wait_forever/src/bsp.rs

@@ -9,3 +9,9 @@ mod raspberrypi;
 
 #[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
 pub use raspberrypi::*;
+
+#[cfg(feature = "bsp_hifive1")]
+mod hifive1;
+
+#[cfg(feature = "bsp_hifive1")]
+pub use hifive1::*;

01_wait_forever/src/bsp/hifive1.rs

@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2020 Ken Kawamoto <kentaro.kawamoto@gmail.com>
+
+//! Top-level BSP file for the HiFive1.
+
+// Coming soon.

01_wait_forever/src/bsp/hifive1/link.ld

@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: MIT OR Apache-2.0
+ *
+ * Copyright (c) 2020 Ken Kawamoto <kentaro.kawamoto@gmail.com>
+ */
+
+OUTPUT_ARCH("riscv")
+
+ENTRY(_start)
+
+SECTIONS
+{
+    /* Set current address to the value from which the RPi starts execution */
+    . = 0x20400000;
+
+    .text :
+    {
+        *(.text._start) *(.text*)
+    }
+
+    /DISCARD/ : { *(.comment*) }
+}

01_wait_forever/src/cpu.rs

@@ -7,4 +7,10 @@
 #[cfg(target_arch = "aarch64")]
 #[path = "_arch/aarch64/cpu.rs"]
 mod arch_cpu;
+
+#[cfg(target_arch = "riscv32")]
+#[path = "_arch/riscv32/cpu.rs"]
+mod arch_cpu;
+
+
 pub use arch_cpu::*;

docker/rustembedded-osdev-utils/Dockerfile

@@ -46,7 +46,9 @@ RUN set -ex;                                        \
     git clone git://git.qemu.org/qemu.git;                     \
     cd qemu;                                                   \
     git checkout tags/v5.0.0;                                  \
-    ./configure --target-list=aarch64-softmmu --enable-modules \
+    ./configure                                                \
+        --target-list=aarch64-softmmu,riscv32-softmmu          \
+        --enable-modules                                       \
         --enable-tcg-interpreter --enable-debug-tcg            \
         --python=/usr/bin/python3;                             \
     make -j8;                                                  \

docker/rustembedded-osdev-utils/Makefile

@@ -9,3 +9,9 @@ docker_build:
 	docker build -t rustembedded/osdev-utils \
 	--build-arg VCS_REF=`git rev-parse --short HEAD` .
 	rm Gemfile
+
+docker_build_riscv:
+	cp ../../Gemfile .
+	docker build -t imsuten/osdev-utils \
+	--build-arg VCS_REF=`git rev-parse --short HEAD` .
+	rm Gemfile