Add tutorial 13
Andre Richter
4 years ago
parent
f6832bec31
commit
99daef4b23
@ -0,0 +1,2 @@
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[target.'cfg(target_os = "none")']
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runner = "target/kernel_test_runner.sh"
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@ -0,0 +1,10 @@
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{
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"editor.formatOnSave": true,
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"rust.features": [
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"bsp_rpi3"
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],
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"rust.all_targets": false,
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"editor.rulers": [
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100
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],
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}
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@ -0,0 +1,187 @@
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# This file is automatically @generated by Cargo.
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# It is not intended for manual editing.
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[[package]]
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name = "array-init"
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version = "0.0.4"
|
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source = "registry+https://github.com/rust-lang/crates.io-index"
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dependencies = [
|
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"nodrop 0.1.14 (registry+https://github.com/rust-lang/crates.io-index)",
|
||||
]
|
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|
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[[package]]
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name = "bit_field"
|
||||
version = "0.9.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
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|
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[[package]]
|
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name = "bitflags"
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||||
version = "1.2.1"
|
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source = "registry+https://github.com/rust-lang/crates.io-index"
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[[package]]
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name = "cast"
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version = "0.2.3"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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dependencies = [
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"rustc_version 0.2.3 (registry+https://github.com/rust-lang/crates.io-index)",
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]
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[[package]]
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name = "cortex-a"
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version = "2.8.2"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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dependencies = [
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"register 0.4.2 (registry+https://github.com/rust-lang/crates.io-index)",
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]
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[[package]]
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name = "kernel"
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version = "0.1.0"
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dependencies = [
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"cortex-a 2.8.2 (registry+https://github.com/rust-lang/crates.io-index)",
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"patches 0.1.0",
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"qemu-exit 0.1.0 (registry+https://github.com/rust-lang/crates.io-index)",
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"r0 0.2.2 (registry+https://github.com/rust-lang/crates.io-index)",
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"register 0.4.2 (registry+https://github.com/rust-lang/crates.io-index)",
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"test-macros 0.1.0",
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"test-types 0.1.0",
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]
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[[package]]
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name = "nodrop"
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version = "0.1.14"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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[[package]]
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name = "patches"
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version = "0.1.0"
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[[package]]
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name = "proc-macro2"
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version = "1.0.6"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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dependencies = [
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"unicode-xid 0.2.0 (registry+https://github.com/rust-lang/crates.io-index)",
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]
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[[package]]
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name = "qemu-exit"
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version = "0.1.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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dependencies = [
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"x86_64 0.7.7 (registry+https://github.com/rust-lang/crates.io-index)",
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]
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[[package]]
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name = "quote"
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version = "1.0.2"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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dependencies = [
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"proc-macro2 1.0.6 (registry+https://github.com/rust-lang/crates.io-index)",
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]
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[[package]]
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name = "r0"
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version = "0.2.2"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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[[package]]
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name = "register"
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version = "0.4.2"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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dependencies = [
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"tock-registers 0.4.1 (registry+https://github.com/rust-lang/crates.io-index)",
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]
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[[package]]
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name = "rustc_version"
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version = "0.2.3"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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dependencies = [
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"semver 0.9.0 (registry+https://github.com/rust-lang/crates.io-index)",
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]
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[[package]]
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name = "semver"
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version = "0.9.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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dependencies = [
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"semver-parser 0.7.0 (registry+https://github.com/rust-lang/crates.io-index)",
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]
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[[package]]
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name = "semver-parser"
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version = "0.7.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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[[package]]
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name = "syn"
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version = "1.0.11"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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dependencies = [
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"proc-macro2 1.0.6 (registry+https://github.com/rust-lang/crates.io-index)",
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"quote 1.0.2 (registry+https://github.com/rust-lang/crates.io-index)",
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"unicode-xid 0.2.0 (registry+https://github.com/rust-lang/crates.io-index)",
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]
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[[package]]
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name = "test-macros"
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version = "0.1.0"
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dependencies = [
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"proc-macro2 1.0.6 (registry+https://github.com/rust-lang/crates.io-index)",
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"quote 1.0.2 (registry+https://github.com/rust-lang/crates.io-index)",
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"syn 1.0.11 (registry+https://github.com/rust-lang/crates.io-index)",
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"test-types 0.1.0",
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]
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[[package]]
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name = "test-types"
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version = "0.1.0"
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[[package]]
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name = "tock-registers"
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version = "0.4.1"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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[[package]]
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name = "unicode-xid"
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version = "0.2.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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[[package]]
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name = "ux"
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version = "0.1.3"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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[[package]]
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name = "x86_64"
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version = "0.7.7"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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dependencies = [
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"array-init 0.0.4 (registry+https://github.com/rust-lang/crates.io-index)",
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"bit_field 0.9.0 (registry+https://github.com/rust-lang/crates.io-index)",
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"bitflags 1.2.1 (registry+https://github.com/rust-lang/crates.io-index)",
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"cast 0.2.3 (registry+https://github.com/rust-lang/crates.io-index)",
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"ux 0.1.3 (registry+https://github.com/rust-lang/crates.io-index)",
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]
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[metadata]
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"checksum array-init 0.0.4 (registry+https://github.com/rust-lang/crates.io-index)" = "23589ecb866b460d3a0f1278834750268c607e8e28a1b982c907219f3178cd72"
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"checksum bit_field 0.9.0 (registry+https://github.com/rust-lang/crates.io-index)" = "ed8765909f9009617974ab6b7d332625b320b33c326b1e9321382ef1999b5d56"
|
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"checksum bitflags 1.2.1 (registry+https://github.com/rust-lang/crates.io-index)" = "cf1de2fe8c75bc145a2f577add951f8134889b4795d47466a54a5c846d691693"
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"checksum cast 0.2.3 (registry+https://github.com/rust-lang/crates.io-index)" = "4b9434b9a5aa1450faa3f9cb14ea0e8c53bb5d2b3c1bfd1ab4fc03e9f33fbfb0"
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"checksum cortex-a 2.8.2 (registry+https://github.com/rust-lang/crates.io-index)" = "4aab2f5271d9bf17a52b34dd99993648132df3dacb79312a33332f2b6ae1d0fd"
|
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"checksum nodrop 0.1.14 (registry+https://github.com/rust-lang/crates.io-index)" = "72ef4a56884ca558e5ddb05a1d1e7e1bfd9a68d9ed024c21704cc98872dae1bb"
|
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"checksum proc-macro2 1.0.6 (registry+https://github.com/rust-lang/crates.io-index)" = "9c9e470a8dc4aeae2dee2f335e8f533e2d4b347e1434e5671afc49b054592f27"
|
||||
"checksum qemu-exit 0.1.0 (registry+https://github.com/rust-lang/crates.io-index)" = "6eef8966dfa42074458b801f4ca70c0a070a84a500022584cc11d7a3c1fdb105"
|
||||
"checksum quote 1.0.2 (registry+https://github.com/rust-lang/crates.io-index)" = "053a8c8bcc71fcce321828dc897a98ab9760bef03a4fc36693c231e5b3216cfe"
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"checksum r0 0.2.2 (registry+https://github.com/rust-lang/crates.io-index)" = "e2a38df5b15c8d5c7e8654189744d8e396bddc18ad48041a500ce52d6948941f"
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"checksum register 0.4.2 (registry+https://github.com/rust-lang/crates.io-index)" = "a51f149d257caa7d9aed1f870d573ba5e2429576e6fed0693341f23078c98e55"
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"checksum rustc_version 0.2.3 (registry+https://github.com/rust-lang/crates.io-index)" = "138e3e0acb6c9fb258b19b67cb8abd63c00679d2851805ea151465464fe9030a"
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||||
"checksum semver 0.9.0 (registry+https://github.com/rust-lang/crates.io-index)" = "1d7eb9ef2c18661902cc47e535f9bc51b78acd254da71d375c2f6720d9a40403"
|
||||
"checksum semver-parser 0.7.0 (registry+https://github.com/rust-lang/crates.io-index)" = "388a1df253eca08550bef6c72392cfe7c30914bf41df5269b68cbd6ff8f570a3"
|
||||
"checksum syn 1.0.11 (registry+https://github.com/rust-lang/crates.io-index)" = "dff0acdb207ae2fe6d5976617f887eb1e35a2ba52c13c7234c790960cdad9238"
|
||||
"checksum tock-registers 0.4.1 (registry+https://github.com/rust-lang/crates.io-index)" = "50af9c49c55cfb4437dd78c1fada3be5d088cbe1bea641db8171283503606a70"
|
||||
"checksum unicode-xid 0.2.0 (registry+https://github.com/rust-lang/crates.io-index)" = "826e7639553986605ec5979c7dd957c7895e93eabed50ab2ffa7f6128a75097c"
|
||||
"checksum ux 0.1.3 (registry+https://github.com/rust-lang/crates.io-index)" = "88dfeb711b61ce620c0cb6fd9f8e3e678622f0c971da2a63c4b3e25e88ed012f"
|
||||
"checksum x86_64 0.7.7 (registry+https://github.com/rust-lang/crates.io-index)" = "1f27d9168654aee1b0c1b73746caeb4aa33248f8b8c8f6e100e697fcc2a794b2"
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@ -0,0 +1,52 @@
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[package]
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name = "kernel"
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version = "0.1.0"
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authors = ["Andre Richter <andre.o.richter@gmail.com>"]
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edition = "2018"
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[package.metadata.cargo-xbuild]
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sysroot_path = "../xbuild_sysroot"
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# The features section is used to select the target board.
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[features]
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default = []
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bsp_rpi3 = ["cortex-a", "register"]
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bsp_rpi4 = ["cortex-a", "register"]
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[dependencies]
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r0 = "0.2.*"
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qemu-exit = "0.1.x"
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test-types = { path = "test-types" }
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# Optional dependencies
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cortex-a = { version = "2.8.x", optional = true }
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register = { version = "0.4.x", optional = true }
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# Temporary workaround for register-rs.
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patches = { path = "patches" }
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##--------------------------------------------------------------------------------------------------
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## Testing
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##--------------------------------------------------------------------------------------------------
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[dev-dependencies]
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test-macros = { path = "test-macros" }
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# Unit tests are done in the library part of the kernel.
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[lib]
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name = "libkernel"
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test = true
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# Disable unit tests for the kernel binary.
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[[bin]]
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name = "kernel"
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test = false
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# List of tests without harness.
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[[test]]
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name = "00_interface_sanity_console"
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harness = false
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[[test]]
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name = "02_arch_exception_handling"
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harness = false
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@ -0,0 +1,157 @@
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## SPDX-License-Identifier: MIT OR Apache-2.0
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##
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## Copyright (c) 2018-2019 Andre Richter <andre.o.richter@gmail.com>
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# Default to the RPi3
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ifndef BSP
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BSP = rpi3
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endif
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# BSP-specific arguments
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ifeq ($(BSP),rpi3)
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TARGET = aarch64-unknown-none-softfloat
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OUTPUT = kernel8.img
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QEMU_BINARY = qemu-system-aarch64
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QEMU_MACHINE_TYPE = raspi3
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QEMU_RELEASE_ARGS = -serial stdio -display none
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QEMU_TEST_ARGS = $(QEMU_RELEASE_ARGS) -semihosting
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OPENOCD_ARG = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi3.cfg
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JTAG_BOOT_IMAGE = jtag_boot_rpi3.img
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LINKER_FILE = src/bsp/rpi/link.ld
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RUSTC_MISC_ARGS = -C target-cpu=cortex-a53
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else ifeq ($(BSP),rpi4)
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TARGET = aarch64-unknown-none-softfloat
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OUTPUT = kernel8.img
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# QEMU_BINARY = qemu-system-aarch64
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# QEMU_MACHINE_TYPE =
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# QEMU_RELEASE_ARGS = -serial stdio -display none
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# QEMU_TEST_ARGS = $(QEMU_RELEASE_ARGS) -semihosting
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OPENOCD_ARG = -f /openocd/tcl/interface/ftdi/olimex-arm-usb-tiny-h.cfg -f /openocd/rpi4.cfg
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JTAG_BOOT_IMAGE = jtag_boot_rpi4.img
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LINKER_FILE = src/bsp/rpi/link.ld
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RUSTC_MISC_ARGS = -C target-cpu=cortex-a72
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endif
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# Testing-specific arguments
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ifdef TEST
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TEST_ARG = --test $(TEST)
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endif
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QEMU_MISSING_STRING = "This board is not yet supported for QEMU."
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RUSTFLAGS = -C link-arg=-T$(LINKER_FILE) $(RUSTC_MISC_ARGS)
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RUSTFLAGS_PEDANTIC = $(RUSTFLAGS) -D warnings -D missing_docs
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SOURCES = $(wildcard **/*.rs) $(wildcard **/*.S) $(wildcard **/*.ld)
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X_CMD_ARGS = --target=$(TARGET) \
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--features bsp_$(BSP) \
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--release
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XRUSTC_CMD = cargo xrustc $(X_CMD_ARGS)
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XTEST_CMD = cargo xtest $(X_CMD_ARGS)
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CARGO_OUTPUT = target/$(TARGET)/release/kernel
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OBJCOPY_CMD = cargo objcopy \
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-- \
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--strip-all \
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-O binary
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CONTAINER_UTILS = rustembedded/osdev-utils
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DOCKER_CMD = docker run -it --rm
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DOCKER_ARG_CURDIR = -v $(shell pwd):/work -w /work
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DOCKER_ARG_TTY = --privileged -v /dev:/dev
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DOCKER_ARG_JTAG = -v $(shell pwd)/../X1_JTAG_boot:/jtag
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DOCKER_ARG_NET = --network host
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DOCKER_EXEC_QEMU = $(QEMU_BINARY) -M $(QEMU_MACHINE_TYPE)
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DOCKER_EXEC_RASPBOOT = raspbootcom
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DOCKER_EXEC_RASPBOOT_DEV = /dev/ttyUSB0
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# DOCKER_EXEC_RASPBOOT_DEV = /dev/ttyACM0
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.PHONY: all doc qemu chainboot jtagboot openocd gdb gdb-opt0 clippy clean readelf objdump nm test
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||||
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all: clean $(OUTPUT)
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$(CARGO_OUTPUT): $(SOURCES)
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RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(XRUSTC_CMD)
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$(OUTPUT): $(CARGO_OUTPUT)
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cp $< .
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$(OBJCOPY_CMD) $< $(OUTPUT)
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doc:
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cargo xdoc --target=$(TARGET) --features bsp_$(BSP) --document-private-items
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xdg-open target/$(TARGET)/doc/libkernel/index.html
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ifeq ($(QEMU_MACHINE_TYPE),)
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qemu:
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@echo $(QEMU_MISSING_STRING)
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test:
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@echo $(QEMU_MISSING_STRING)
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else
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qemu: all
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$(DOCKER_CMD) $(DOCKER_ARG_CURDIR) $(CONTAINER_UTILS) \
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$(DOCKER_EXEC_QEMU) $(QEMU_RELEASE_ARGS) \
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-kernel $(OUTPUT)
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define kernel_test_runner
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#!/usr/bin/env bash
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$(OBJCOPY_CMD) $$1 $$1.img
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TEST_BINARY=$$(echo $$1.img | sed -e 's/.*target/target/g')
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$(DOCKER_CMD) $(DOCKER_ARG_CURDIR) $(CONTAINER_UTILS) \
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ruby tests/runner.rb $(DOCKER_EXEC_QEMU) $(QEMU_TEST_ARGS) -kernel $$TEST_BINARY
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||||
endef
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||||
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test: $(SOURCES)
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@mkdir -p target
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||||
$(file > target/kernel_test_runner.sh,$(kernel_test_runner))
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||||
@chmod +x target/kernel_test_runner.sh
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RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(XTEST_CMD) $(TEST_ARG)
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||||
endif
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||||
|
||||
chainboot: all
|
||||
$(DOCKER_CMD) $(DOCKER_ARG_CURDIR) $(DOCKER_ARG_TTY) \
|
||||
$(CONTAINER_UTILS) $(DOCKER_EXEC_RASPBOOT) $(DOCKER_EXEC_RASPBOOT_DEV) \
|
||||
$(OUTPUT)
|
||||
|
||||
jtagboot:
|
||||
$(DOCKER_CMD) $(DOCKER_ARG_TTY) $(DOCKER_ARG_JTAG) $(CONTAINER_UTILS) \
|
||||
$(DOCKER_EXEC_RASPBOOT) $(DOCKER_EXEC_RASPBOOT_DEV) \
|
||||
/jtag/$(JTAG_BOOT_IMAGE)
|
||||
|
||||
openocd:
|
||||
$(DOCKER_CMD) $(DOCKER_ARG_TTY) $(DOCKER_ARG_NET) $(CONTAINER_UTILS) \
|
||||
openocd $(OPENOCD_ARG)
|
||||
|
||||
define gen_gdb
|
||||
RUSTFLAGS="$(RUSTFLAGS_PEDANTIC)" $(XRUSTC_CMD) $1
|
||||
cp $(CARGO_OUTPUT) kernel_for_jtag
|
||||
$(DOCKER_CMD) $(DOCKER_ARG_CURDIR) $(DOCKER_ARG_NET) $(CONTAINER_UTILS) \
|
||||
gdb-multiarch -q kernel_for_jtag
|
||||
endef
|
||||
|
||||
gdb: clean $(SOURCES)
|
||||
$(call gen_gdb,-C debuginfo=2)
|
||||
|
||||
gdb-opt0: clean $(SOURCES)
|
||||
$(call gen_gdb,-C debuginfo=2 -C opt-level=0)
|
||||
|
||||
clippy:
|
||||
cargo xclippy --target=$(TARGET) --features bsp_$(BSP)
|
||||
|
||||
clean:
|
||||
rm -rf target
|
||||
|
||||
readelf:
|
||||
readelf -a kernel
|
||||
|
||||
objdump:
|
||||
cargo objdump --target $(TARGET) -- -disassemble -no-show-raw-insn -print-imm-hex kernel
|
||||
|
||||
nm:
|
||||
cargo nm --target $(TARGET) -- -print-size kernel | sort
|
||||
File diff suppressed because it is too large
Load Diff
Binary file not shown.
Binary file not shown.
@ -0,0 +1,5 @@
|
||||
[package]
|
||||
name = "patches"
|
||||
version = "0.1.0"
|
||||
authors = ["Andre Richter <andre.o.richter@gmail.com>"]
|
||||
edition = "2018"
|
||||
@ -0,0 +1,24 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
//! Fix for register-rs.
|
||||
//!
|
||||
//! Used temporarily until https://github.com/tock/tock/issues/1482 is resolved.
|
||||
|
||||
#![no_std]
|
||||
|
||||
/// A temporary overwrite for tock's register_structs! so that it does not emit `#[test]` attributes.
|
||||
#[macro_export]
|
||||
macro_rules! register_structs {
|
||||
{
|
||||
$(
|
||||
$(#[$attr:meta])*
|
||||
$name:ident {
|
||||
$( $fields:tt )*
|
||||
}
|
||||
),*
|
||||
} => {
|
||||
$( register_fields!(@root $(#[$attr])* $name { $($fields)* } ); )*
|
||||
};
|
||||
}
|
||||
@ -0,0 +1,39 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2018-2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
//! Conditional exporting of processor architecture code.
|
||||
|
||||
#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
|
||||
mod aarch64;
|
||||
|
||||
#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
|
||||
pub use aarch64::*;
|
||||
|
||||
/// Architectural privilege level.
|
||||
#[allow(missing_docs)]
|
||||
#[derive(PartialEq)]
|
||||
pub enum PrivilegeLevel {
|
||||
User,
|
||||
Kernel,
|
||||
Hypervisor,
|
||||
Unknown,
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// Testing
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
|
||||
#[cfg(test)]
|
||||
mod tests {
|
||||
use super::*;
|
||||
use test_macros::kernel_test;
|
||||
|
||||
/// Libkernel unit tests must execute in kernel mode.
|
||||
#[kernel_test]
|
||||
fn test_runner_executes_in_kernel_mode() {
|
||||
let (level, _) = state::current_privilege_level();
|
||||
|
||||
assert!(level == PrivilegeLevel::Kernel)
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,133 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2018-2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
/// Call the function provided by parameter `\handler` after saving exception context. Provide the
|
||||
/// context as the first parameter to '\handler'.
|
||||
.macro CALL_WITH_CONTEXT handler
|
||||
// Make room on the stack for the exception context.
|
||||
sub sp, sp, #16 * 17
|
||||
|
||||
// Store all general purpose registers on the stack.
|
||||
stp x0, x1, [sp, #16 * 0]
|
||||
stp x2, x3, [sp, #16 * 1]
|
||||
stp x4, x5, [sp, #16 * 2]
|
||||
stp x6, x7, [sp, #16 * 3]
|
||||
stp x8, x9, [sp, #16 * 4]
|
||||
stp x10, x11, [sp, #16 * 5]
|
||||
stp x12, x13, [sp, #16 * 6]
|
||||
stp x14, x15, [sp, #16 * 7]
|
||||
stp x16, x17, [sp, #16 * 8]
|
||||
stp x18, x19, [sp, #16 * 9]
|
||||
stp x20, x21, [sp, #16 * 10]
|
||||
stp x22, x23, [sp, #16 * 11]
|
||||
stp x24, x25, [sp, #16 * 12]
|
||||
stp x26, x27, [sp, #16 * 13]
|
||||
stp x28, x29, [sp, #16 * 14]
|
||||
|
||||
// Add the exception link register (ELR_EL1) and the saved program status (SPSR_EL1).
|
||||
mrs x1, ELR_EL1
|
||||
mrs x2, SPSR_EL1
|
||||
|
||||
stp lr, x1, [sp, #16 * 15]
|
||||
str w2, [sp, #16 * 16]
|
||||
|
||||
// x0 is the first argument for the function called through `\handler`.
|
||||
mov x0, sp
|
||||
|
||||
// Call `\handler`.
|
||||
bl \handler
|
||||
|
||||
// After returning from exception handling code, replay the saved context and return via `eret`.
|
||||
b __exception_restore_context
|
||||
.endm
|
||||
|
||||
.macro FIQ_SUSPEND
|
||||
1: wfe
|
||||
b 1b
|
||||
.endm
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// The exception vector table.
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
.section .exception_vectors, "ax", @progbits
|
||||
|
||||
// Align by 2^11 bytes, as demanded by the AArch64 spec. Same as ALIGN(2048) in an ld script.
|
||||
.align 11
|
||||
|
||||
// Export a symbol for the Rust code to use.
|
||||
__exception_vector_start:
|
||||
|
||||
// Current exception level with SP_EL0.
|
||||
// .org sets the offset relative to section start.
|
||||
//
|
||||
// It must be ensured that `CALL_WITH_CONTEXT` <= 0x80 bytes.
|
||||
.org 0x000
|
||||
CALL_WITH_CONTEXT current_el0_synchronous
|
||||
.org 0x080
|
||||
CALL_WITH_CONTEXT current_el0_irq
|
||||
.org 0x100
|
||||
FIQ_SUSPEND
|
||||
.org 0x180
|
||||
CALL_WITH_CONTEXT current_el0_serror
|
||||
|
||||
// Current exception level with SP_ELx, x > 0.
|
||||
.org 0x200
|
||||
CALL_WITH_CONTEXT current_elx_synchronous
|
||||
.org 0x280
|
||||
CALL_WITH_CONTEXT current_elx_irq
|
||||
.org 0x300
|
||||
FIQ_SUSPEND
|
||||
.org 0x380
|
||||
CALL_WITH_CONTEXT current_elx_serror
|
||||
|
||||
// Lower exception level, aarch64
|
||||
.org 0x400
|
||||
CALL_WITH_CONTEXT lower_aarch64_synchronous
|
||||
.org 0x480
|
||||
CALL_WITH_CONTEXT lower_aarch64_irq
|
||||
.org 0x500
|
||||
FIQ_SUSPEND
|
||||
.org 0x580
|
||||
CALL_WITH_CONTEXT lower_aarch64_serror
|
||||
|
||||
// Lower exception level, aarch32
|
||||
.org 0x600
|
||||
CALL_WITH_CONTEXT lower_aarch32_synchronous
|
||||
.org 0x680
|
||||
CALL_WITH_CONTEXT lower_aarch32_irq
|
||||
.org 0x700
|
||||
FIQ_SUSPEND
|
||||
.org 0x780
|
||||
CALL_WITH_CONTEXT lower_aarch32_serror
|
||||
.org 0x800
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// Helper functions
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
__exception_restore_context:
|
||||
ldr w19, [sp, #16 * 16]
|
||||
ldp lr, x20, [sp, #16 * 15]
|
||||
|
||||
msr SPSR_EL1, x19
|
||||
msr ELR_EL1, x20
|
||||
|
||||
ldp x0, x1, [sp, #16 * 0]
|
||||
ldp x2, x3, [sp, #16 * 1]
|
||||
ldp x4, x5, [sp, #16 * 2]
|
||||
ldp x6, x7, [sp, #16 * 3]
|
||||
ldp x8, x9, [sp, #16 * 4]
|
||||
ldp x10, x11, [sp, #16 * 5]
|
||||
ldp x12, x13, [sp, #16 * 6]
|
||||
ldp x14, x15, [sp, #16 * 7]
|
||||
ldp x16, x17, [sp, #16 * 8]
|
||||
ldp x18, x19, [sp, #16 * 9]
|
||||
ldp x20, x21, [sp, #16 * 10]
|
||||
ldp x22, x23, [sp, #16 * 11]
|
||||
ldp x24, x25, [sp, #16 * 12]
|
||||
ldp x26, x27, [sp, #16 * 13]
|
||||
ldp x28, x29, [sp, #16 * 14]
|
||||
|
||||
add sp, sp, #16 * 17
|
||||
|
||||
eret
|
||||
@ -0,0 +1,274 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2018-2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
//! Exception handling.
|
||||
|
||||
use core::fmt;
|
||||
use cortex_a::{barrier, regs::*};
|
||||
use register::InMemoryRegister;
|
||||
|
||||
// Assembly counterpart to this file.
|
||||
global_asm!(include_str!("exception.S"));
|
||||
|
||||
/// Wrapper struct for memory copy of SPSR_EL1.
|
||||
#[repr(transparent)]
|
||||
struct SpsrEL1(InMemoryRegister<u32, SPSR_EL1::Register>);
|
||||
|
||||
/// The exception context as it is stored on the stack on exception entry.
|
||||
#[repr(C)]
|
||||
struct ExceptionContext {
|
||||
// General Purpose Registers.
|
||||
gpr: [u64; 30],
|
||||
// The link register, aka x30.
|
||||
lr: u64,
|
||||
// Exception link register. The program counter at the time the exception happened.
|
||||
elr_el1: u64,
|
||||
// Saved program status.
|
||||
spsr_el1: SpsrEL1,
|
||||
}
|
||||
|
||||
/// Wrapper struct for pretty printing ESR_EL1.
|
||||
struct EsrEL1;
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// Exception vector implementation
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
|
||||
/// Print verbose information about the exception and the panic.
|
||||
fn default_exception_handler(e: &ExceptionContext) {
|
||||
panic!(
|
||||
"\n\nCPU Exception!\n\
|
||||
FAR_EL1: {:#018x}\n\
|
||||
{}\n\
|
||||
{}",
|
||||
FAR_EL1.get(),
|
||||
EsrEL1 {},
|
||||
e
|
||||
);
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// Current, EL0
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
|
||||
#[no_mangle]
|
||||
unsafe extern "C" fn current_el0_synchronous(e: &mut ExceptionContext) {
|
||||
default_exception_handler(e);
|
||||
}
|
||||
|
||||
#[no_mangle]
|
||||
unsafe extern "C" fn current_el0_irq(e: &mut ExceptionContext) {
|
||||
default_exception_handler(e);
|
||||
}
|
||||
|
||||
#[no_mangle]
|
||||
unsafe extern "C" fn current_el0_serror(e: &mut ExceptionContext) {
|
||||
default_exception_handler(e);
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// Current, ELx
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
|
||||
/// Asynchronous exception taken from the current EL, using SP of the current EL.
|
||||
#[no_mangle]
|
||||
unsafe extern "C" fn current_elx_synchronous(e: &mut ExceptionContext) {
|
||||
default_exception_handler(e);
|
||||
}
|
||||
|
||||
#[no_mangle]
|
||||
unsafe extern "C" fn current_elx_irq(e: &mut ExceptionContext) {
|
||||
default_exception_handler(e);
|
||||
}
|
||||
|
||||
#[no_mangle]
|
||||
unsafe extern "C" fn current_elx_serror(e: &mut ExceptionContext) {
|
||||
default_exception_handler(e);
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// Lower, AArch64
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
|
||||
#[no_mangle]
|
||||
unsafe extern "C" fn lower_aarch64_synchronous(e: &mut ExceptionContext) {
|
||||
default_exception_handler(e);
|
||||
}
|
||||
|
||||
#[no_mangle]
|
||||
unsafe extern "C" fn lower_aarch64_irq(e: &mut ExceptionContext) {
|
||||
default_exception_handler(e);
|
||||
}
|
||||
|
||||
#[no_mangle]
|
||||
unsafe extern "C" fn lower_aarch64_serror(e: &mut ExceptionContext) {
|
||||
default_exception_handler(e);
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// Lower, AArch32
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
|
||||
#[no_mangle]
|
||||
unsafe extern "C" fn lower_aarch32_synchronous(e: &mut ExceptionContext) {
|
||||
default_exception_handler(e);
|
||||
}
|
||||
|
||||
#[no_mangle]
|
||||
unsafe extern "C" fn lower_aarch32_irq(e: &mut ExceptionContext) {
|
||||
default_exception_handler(e);
|
||||
}
|
||||
|
||||
#[no_mangle]
|
||||
unsafe extern "C" fn lower_aarch32_serror(e: &mut ExceptionContext) {
|
||||
default_exception_handler(e);
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// Pretty printing
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
|
||||
/// Human readable ESR_EL1.
|
||||
#[rustfmt::skip]
|
||||
impl fmt::Display for EsrEL1 {
|
||||
fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
|
||||
let esr_el1 = ESR_EL1.extract();
|
||||
|
||||
// Raw print of whole register.
|
||||
writeln!(f, "ESR_EL1: {:#010x}", esr_el1.get())?;
|
||||
|
||||
// Raw print of exception class.
|
||||
write!(f, " Exception Class (EC) : {:#x}", esr_el1.read(ESR_EL1::EC))?;
|
||||
|
||||
// Exception class, translation.
|
||||
let ec_translation = match esr_el1.read_as_enum(ESR_EL1::EC) {
|
||||
Some(ESR_EL1::EC::Value::DataAbortCurrentEL) => "Data Abort, current EL",
|
||||
_ => "N/A",
|
||||
};
|
||||
writeln!(f, " - {}", ec_translation)?;
|
||||
|
||||
// Raw print of instruction specific syndrome.
|
||||
write!(f, " Instr Specific Syndrome (ISS): {:#x}", esr_el1.read(ESR_EL1::ISS))?;
|
||||
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
|
||||
/// Human readable SPSR_EL1.
|
||||
#[rustfmt::skip]
|
||||
impl fmt::Display for SpsrEL1 {
|
||||
fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
|
||||
// Raw value.
|
||||
writeln!(f, "SPSR_EL1: {:#010x}", self.0.get())?;
|
||||
|
||||
let to_flag_str = |x| -> _ {
|
||||
if x { "Set" } else { "Not set" }
|
||||
};
|
||||
|
||||
writeln!(f, " Flags:")?;
|
||||
writeln!(f, " Negative (N): {}", to_flag_str(self.0.is_set(SPSR_EL1::N)))?;
|
||||
writeln!(f, " Zero (Z): {}", to_flag_str(self.0.is_set(SPSR_EL1::Z)))?;
|
||||
writeln!(f, " Carry (C): {}", to_flag_str(self.0.is_set(SPSR_EL1::C)))?;
|
||||
writeln!(f, " Overflow (V): {}", to_flag_str(self.0.is_set(SPSR_EL1::V)))?;
|
||||
|
||||
let to_mask_str = |x| -> _ {
|
||||
if x { "Masked" } else { "Unmasked" }
|
||||
};
|
||||
|
||||
writeln!(f, " Exception handling state:")?;
|
||||
writeln!(f, " Debug (D): {}", to_mask_str(self.0.is_set(SPSR_EL1::D)))?;
|
||||
writeln!(f, " SError (A): {}", to_mask_str(self.0.is_set(SPSR_EL1::A)))?;
|
||||
writeln!(f, " IRQ (I): {}", to_mask_str(self.0.is_set(SPSR_EL1::I)))?;
|
||||
writeln!(f, " FIQ (F): {}", to_mask_str(self.0.is_set(SPSR_EL1::F)))?;
|
||||
|
||||
write!(f, " Illegal Execution State (IL): {}",
|
||||
to_flag_str(self.0.is_set(SPSR_EL1::IL))
|
||||
)?;
|
||||
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
|
||||
/// Human readable print of the exception context.
|
||||
impl fmt::Display for ExceptionContext {
|
||||
fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
|
||||
writeln!(f, "ELR_EL1: {:#018x}", self.elr_el1)?;
|
||||
writeln!(f, "{}", self.spsr_el1)?;
|
||||
writeln!(f)?;
|
||||
writeln!(f, "General purpose register:")?;
|
||||
|
||||
#[rustfmt::skip]
|
||||
let alternating = |x| -> _ {
|
||||
if x % 2 == 0 { " " } else { "\n" }
|
||||
};
|
||||
|
||||
// Print two registers per line.
|
||||
for (i, reg) in self.gpr.iter().enumerate() {
|
||||
write!(f, " x{: <2}: {: >#018x}{}", i, reg, alternating(i))?;
|
||||
}
|
||||
write!(f, " lr : {:#018x}", self.lr)?;
|
||||
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// Arch-public
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
|
||||
/// Set the exception vector base address register.
|
||||
///
|
||||
/// # Safety
|
||||
///
|
||||
/// - The vector table and the symbol `__exception_vector_table_start` from the linker script must
|
||||
/// adhere to the alignment and size constraints demanded by the AArch64 spec.
|
||||
pub unsafe fn set_vbar_el1() {
|
||||
// Provided by exception.S.
|
||||
extern "C" {
|
||||
static mut __exception_vector_start: u64;
|
||||
}
|
||||
let addr: u64 = &__exception_vector_start as *const _ as u64;
|
||||
|
||||
VBAR_EL1.set(addr);
|
||||
|
||||
// Force VBAR update to complete before next instruction.
|
||||
barrier::isb(barrier::SY);
|
||||
}
|
||||
|
||||
pub trait DaifField {
|
||||
fn daif_field() -> register::Field<u32, DAIF::Register>;
|
||||
}
|
||||
|
||||
pub struct Debug;
|
||||
pub struct SError;
|
||||
pub struct IRQ;
|
||||
pub struct FIQ;
|
||||
|
||||
impl DaifField for Debug {
|
||||
fn daif_field() -> register::Field<u32, DAIF::Register> {
|
||||
DAIF::D
|
||||
}
|
||||
}
|
||||
|
||||
impl DaifField for SError {
|
||||
fn daif_field() -> register::Field<u32, DAIF::Register> {
|
||||
DAIF::A
|
||||
}
|
||||
}
|
||||
|
||||
impl DaifField for IRQ {
|
||||
fn daif_field() -> register::Field<u32, DAIF::Register> {
|
||||
DAIF::I
|
||||
}
|
||||
}
|
||||
|
||||
impl DaifField for FIQ {
|
||||
fn daif_field() -> register::Field<u32, DAIF::Register> {
|
||||
DAIF::F
|
||||
}
|
||||
}
|
||||
|
||||
pub fn is_masked<T: DaifField>() -> bool {
|
||||
DAIF.is_set(T::daif_field())
|
||||
}
|
||||
@ -0,0 +1,300 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2018-2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
//! Memory Management Unit.
|
||||
//!
|
||||
//! Static page tables, compiled on boot; Everything 64 KiB granule.
|
||||
|
||||
use crate::{
|
||||
bsp, interface,
|
||||
memory::{AccessPermissions, AttributeFields, MemAttributes},
|
||||
};
|
||||
use core::convert;
|
||||
use cortex_a::{barrier, regs::*};
|
||||
use register::register_bitfields;
|
||||
|
||||
// A table descriptor, as per AArch64 Reference Manual Figure D4-15.
|
||||
register_bitfields! {u64,
|
||||
STAGE1_TABLE_DESCRIPTOR [
|
||||
/// Physical address of the next page table.
|
||||
NEXT_LEVEL_TABLE_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
|
||||
|
||||
TYPE OFFSET(1) NUMBITS(1) [
|
||||
Block = 0,
|
||||
Table = 1
|
||||
],
|
||||
|
||||
VALID OFFSET(0) NUMBITS(1) [
|
||||
False = 0,
|
||||
True = 1
|
||||
]
|
||||
]
|
||||
}
|
||||
|
||||
// A level 3 page descriptor, as per AArch64 Reference Manual Figure D4-17.
|
||||
register_bitfields! {u64,
|
||||
STAGE1_PAGE_DESCRIPTOR [
|
||||
/// Privileged execute-never.
|
||||
PXN OFFSET(53) NUMBITS(1) [
|
||||
False = 0,
|
||||
True = 1
|
||||
],
|
||||
|
||||
/// Physical address of the next page table (lvl2) or the page descriptor (lvl3).
|
||||
OUTPUT_ADDR_64KiB OFFSET(16) NUMBITS(32) [], // [47:16]
|
||||
|
||||
/// Access flag.
|
||||
AF OFFSET(10) NUMBITS(1) [
|
||||
False = 0,
|
||||
True = 1
|
||||
],
|
||||
|
||||
/// Shareability field.
|
||||
SH OFFSET(8) NUMBITS(2) [
|
||||
OuterShareable = 0b10,
|
||||
InnerShareable = 0b11
|
||||
],
|
||||
|
||||
/// Access Permissions.
|
||||
AP OFFSET(6) NUMBITS(2) [
|
||||
RW_EL1 = 0b00,
|
||||
RW_EL1_EL0 = 0b01,
|
||||
RO_EL1 = 0b10,
|
||||
RO_EL1_EL0 = 0b11
|
||||
],
|
||||
|
||||
/// Memory attributes index into the MAIR_EL1 register.
|
||||
AttrIndx OFFSET(2) NUMBITS(3) [],
|
||||
|
||||
TYPE OFFSET(1) NUMBITS(1) [
|
||||
Block = 0,
|
||||
Table = 1
|
||||
],
|
||||
|
||||
VALID OFFSET(0) NUMBITS(1) [
|
||||
False = 0,
|
||||
True = 1
|
||||
]
|
||||
]
|
||||
}
|
||||
|
||||
const SIXTYFOUR_KIB_SHIFT: usize = 16; // log2(64 * 1024)
|
||||
const FIVETWELVE_MIB_SHIFT: usize = 29; // log2(512 * 1024 * 1024)
|
||||
|
||||
/// A table descriptor for 64 KiB aperture.
|
||||
///
|
||||
/// The output points to the next table.
|
||||
#[derive(Copy, Clone)]
|
||||
#[repr(transparent)]
|
||||
struct TableDescriptor(u64);
|
||||
|
||||
/// A page descriptor with 64 KiB aperture.
|
||||
///
|
||||
/// The output points to physical memory.
|
||||
#[derive(Copy, Clone)]
|
||||
#[repr(transparent)]
|
||||
struct PageDescriptor(u64);
|
||||
|
||||
/// Big monolithic struct for storing the page tables. Individual levels must be 64 KiB aligned,
|
||||
/// hence the "reverse" order of appearance.
|
||||
#[repr(C)]
|
||||
#[repr(align(65536))]
|
||||
struct PageTables<const N: usize> {
|
||||
// Page descriptors, covering 64 KiB windows per entry.
|
||||
lvl3: [[PageDescriptor; 8192]; N],
|
||||
// Table descriptors, covering 512 MiB windows.
|
||||
lvl2: [TableDescriptor; N],
|
||||
}
|
||||
|
||||
/// Usually evaluates to 1 GiB for RPi3 and 4 GiB for RPi 4.
|
||||
const ENTRIES_512_MIB: usize = bsp::addr_space_size() >> FIVETWELVE_MIB_SHIFT;
|
||||
|
||||
/// The page tables.
|
||||
///
|
||||
/// Supposed to land in `.bss`. Therefore, ensure that they boil down to all "0" entries.
|
||||
static mut TABLES: PageTables<{ ENTRIES_512_MIB }> = PageTables {
|
||||
lvl3: [[PageDescriptor(0); 8192]; ENTRIES_512_MIB],
|
||||
lvl2: [TableDescriptor(0); ENTRIES_512_MIB],
|
||||
};
|
||||
|
||||
trait BaseAddr {
|
||||
fn base_addr_u64(&self) -> u64;
|
||||
fn base_addr_usize(&self) -> usize;
|
||||
}
|
||||
|
||||
impl<T, const N: usize> BaseAddr for [T; N] {
|
||||
fn base_addr_u64(&self) -> u64 {
|
||||
self as *const T as u64
|
||||
}
|
||||
|
||||
fn base_addr_usize(&self) -> usize {
|
||||
self as *const T as usize
|
||||
}
|
||||
}
|
||||
|
||||
impl convert::From<usize> for TableDescriptor {
|
||||
fn from(next_lvl_table_addr: usize) -> Self {
|
||||
let shifted = next_lvl_table_addr >> SIXTYFOUR_KIB_SHIFT;
|
||||
let val = (STAGE1_TABLE_DESCRIPTOR::VALID::True
|
||||
+ STAGE1_TABLE_DESCRIPTOR::TYPE::Table
|
||||
+ STAGE1_TABLE_DESCRIPTOR::NEXT_LEVEL_TABLE_ADDR_64KiB.val(shifted as u64))
|
||||
.value;
|
||||
|
||||
TableDescriptor(val)
|
||||
}
|
||||
}
|
||||
|
||||
/// Convert the kernel's generic memory range attributes to HW-specific attributes of the MMU.
|
||||
impl convert::From<AttributeFields>
|
||||
for register::FieldValue<u64, STAGE1_PAGE_DESCRIPTOR::Register>
|
||||
{
|
||||
fn from(attribute_fields: AttributeFields) -> Self {
|
||||
// Memory attributes.
|
||||
let mut desc = match attribute_fields.mem_attributes {
|
||||
MemAttributes::CacheableDRAM => {
|
||||
STAGE1_PAGE_DESCRIPTOR::SH::InnerShareable
|
||||
+ STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(mair::NORMAL)
|
||||
}
|
||||
MemAttributes::Device => {
|
||||
STAGE1_PAGE_DESCRIPTOR::SH::OuterShareable
|
||||
+ STAGE1_PAGE_DESCRIPTOR::AttrIndx.val(mair::DEVICE)
|
||||
}
|
||||
};
|
||||
|
||||
// Access Permissions.
|
||||
desc += match attribute_fields.acc_perms {
|
||||
AccessPermissions::ReadOnly => STAGE1_PAGE_DESCRIPTOR::AP::RO_EL1,
|
||||
AccessPermissions::ReadWrite => STAGE1_PAGE_DESCRIPTOR::AP::RW_EL1,
|
||||
};
|
||||
|
||||
// Execute Never.
|
||||
desc += if attribute_fields.execute_never {
|
||||
STAGE1_PAGE_DESCRIPTOR::PXN::True
|
||||
} else {
|
||||
STAGE1_PAGE_DESCRIPTOR::PXN::False
|
||||
};
|
||||
|
||||
desc
|
||||
}
|
||||
}
|
||||
|
||||
impl PageDescriptor {
|
||||
fn new(output_addr: usize, attribute_fields: AttributeFields) -> PageDescriptor {
|
||||
let shifted = output_addr >> SIXTYFOUR_KIB_SHIFT;
|
||||
let val = (STAGE1_PAGE_DESCRIPTOR::VALID::True
|
||||
+ STAGE1_PAGE_DESCRIPTOR::AF::True
|
||||
+ attribute_fields.into()
|
||||
+ STAGE1_PAGE_DESCRIPTOR::TYPE::Table
|
||||
+ STAGE1_PAGE_DESCRIPTOR::OUTPUT_ADDR_64KiB.val(shifted as u64))
|
||||
.value;
|
||||
|
||||
PageDescriptor(val)
|
||||
}
|
||||
}
|
||||
|
||||
/// Constants for indexing the MAIR_EL1.
|
||||
#[allow(dead_code)]
|
||||
mod mair {
|
||||
pub const DEVICE: u64 = 0;
|
||||
pub const NORMAL: u64 = 1;
|
||||
}
|
||||
|
||||
/// Setup function for the MAIR_EL1 register.
|
||||
fn set_up_mair() {
|
||||
// Define the memory types being mapped.
|
||||
MAIR_EL1.write(
|
||||
// Attribute 1 - Cacheable normal DRAM.
|
||||
MAIR_EL1::Attr1_HIGH::Memory_OuterWriteBack_NonTransient_ReadAlloc_WriteAlloc
|
||||
+ MAIR_EL1::Attr1_LOW_MEMORY::InnerWriteBack_NonTransient_ReadAlloc_WriteAlloc
|
||||
|
||||
// Attribute 0 - Device.
|
||||
+ MAIR_EL1::Attr0_HIGH::Device
|
||||
+ MAIR_EL1::Attr0_LOW_DEVICE::Device_nGnRE,
|
||||
);
|
||||
}
|
||||
|
||||
/// Iterates over all static page table entries and fills them at once.
|
||||
///
|
||||
/// # Safety
|
||||
///
|
||||
/// - Modifies a `static mut`. Ensure it only happens from here.
|
||||
unsafe fn populate_pt_entries() -> Result<(), &'static str> {
|
||||
for (l2_nr, l2_entry) in TABLES.lvl2.iter_mut().enumerate() {
|
||||
*l2_entry = TABLES.lvl3[l2_nr].base_addr_usize().into();
|
||||
|
||||
for (l3_nr, l3_entry) in TABLES.lvl3[l2_nr].iter_mut().enumerate() {
|
||||
let virt_addr = (l2_nr << FIVETWELVE_MIB_SHIFT) + (l3_nr << SIXTYFOUR_KIB_SHIFT);
|
||||
|
||||
let (output_addr, attribute_fields) =
|
||||
bsp::virt_mem_layout().get_virt_addr_properties(virt_addr)?;
|
||||
|
||||
*l3_entry = PageDescriptor::new(output_addr, attribute_fields);
|
||||
}
|
||||
}
|
||||
|
||||
Ok(())
|
||||
}
|
||||
|
||||
/// Configure various settings of stage 1 of the EL1 translation regime.
|
||||
fn configure_translation_control() {
|
||||
let ips = ID_AA64MMFR0_EL1.read(ID_AA64MMFR0_EL1::PARange);
|
||||
TCR_EL1.write(
|
||||
TCR_EL1::TBI0::Ignored
|
||||
+ TCR_EL1::IPS.val(ips)
|
||||
+ TCR_EL1::TG0::KiB_64
|
||||
+ TCR_EL1::SH0::Inner
|
||||
+ TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
|
||||
+ TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
|
||||
+ TCR_EL1::EPD0::EnableTTBR0Walks
|
||||
+ TCR_EL1::T0SZ.val(32), // TTBR0 spans 4 GiB total.
|
||||
);
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// Arch-public
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
|
||||
pub struct MMU;
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// OS interface implementations
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
|
||||
impl interface::mm::MMU for MMU {
|
||||
/// Compile the page tables from the `BSP`-supplied `virt_mem_layout()`.
|
||||
///
|
||||
/// # Safety
|
||||
///
|
||||
/// - User must ensure that the hardware supports the paremeters being set here.
|
||||
unsafe fn init(&self) -> Result<(), &'static str> {
|
||||
// Fail early if translation granule is not supported. Both RPis support it, though.
|
||||
if !ID_AA64MMFR0_EL1.matches_all(ID_AA64MMFR0_EL1::TGran64::Supported) {
|
||||
return Err("64 KiB translation granule not supported");
|
||||
}
|
||||
|
||||
// Prepare the memory attribute indirection register.
|
||||
set_up_mair();
|
||||
|
||||
// Populate page tables.
|
||||
populate_pt_entries()?;
|
||||
|
||||
// Set the "Translation Table Base Register".
|
||||
TTBR0_EL1.set_baddr(TABLES.lvl2.base_addr_u64());
|
||||
|
||||
configure_translation_control();
|
||||
|
||||
// Switch the MMU on.
|
||||
//
|
||||
// First, force all previous changes to be seen before the MMU is enabled.
|
||||
barrier::isb(barrier::SY);
|
||||
|
||||
// Enable the MMU and turn on data and instruction caching.
|
||||
SCTLR_EL1.modify(SCTLR_EL1::M::Enable + SCTLR_EL1::C::Cacheable + SCTLR_EL1::I::Cacheable);
|
||||
|
||||
// Force MMU init to complete before next instruction.
|
||||
barrier::isb(barrier::SY);
|
||||
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,53 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2018-2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
//! Synchronization primitives.
|
||||
|
||||
use crate::interface;
|
||||
use core::cell::UnsafeCell;
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// Arch-public
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
|
||||
/// A pseudo-lock for teaching purposes.
|
||||
///
|
||||
/// Used to introduce [interior mutability].
|
||||
///
|
||||
/// In contrast to a real Mutex implementation, does not protect against concurrent access to the
|
||||
/// contained data. This part is preserved for later lessons.
|
||||
///
|
||||
/// The lock will only be used as long as it is safe to do so, i.e. as long as the kernel is
|
||||
/// executing single-threaded, aka only running on a single core with interrupts disabled.
|
||||
///
|
||||
/// [interior mutability]: https://doc.rust-lang.org/std/cell/index.html
|
||||
pub struct NullLock<T: ?Sized> {
|
||||
data: UnsafeCell<T>,
|
||||
}
|
||||
|
||||
unsafe impl<T: ?Sized + Send> Send for NullLock<T> {}
|
||||
unsafe impl<T: ?Sized + Send> Sync for NullLock<T> {}
|
||||
|
||||
impl<T> NullLock<T> {
|
||||
/// Wraps `data` into a new `NullLock`.
|
||||
pub const fn new(data: T) -> NullLock<T> {
|
||||
NullLock {
|
||||
data: UnsafeCell::new(data),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// OS interface implementations
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
|
||||
impl<T> interface::sync::Mutex for &NullLock<T> {
|
||||
type Data = T;
|
||||
|
||||
fn lock<R>(&mut self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
|
||||
// In a real lock, there would be code encapsulating this line that ensures that this
|
||||
// mutable reference will ever only be given out once at a time.
|
||||
f(unsafe { &mut *self.data.get() })
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,81 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2018-2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
//! Timer primitives.
|
||||
|
||||
use crate::{interface, warn};
|
||||
use core::time::Duration;
|
||||
use cortex_a::regs::*;
|
||||
|
||||
const NS_PER_S: u64 = 1_000_000_000;
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// Arch-public
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
|
||||
pub struct Timer;
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// OS interface implementations
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
|
||||
impl interface::time::Timer for Timer {
|
||||
fn resolution(&self) -> Duration {
|
||||
Duration::from_nanos(NS_PER_S / (CNTFRQ_EL0.get() as u64))
|
||||
}
|
||||
|
||||
fn uptime(&self) -> Duration {
|
||||
let frq: u64 = CNTFRQ_EL0.get() as u64;
|
||||
let current_count: u64 = CNTPCT_EL0.get() * NS_PER_S;
|
||||
|
||||
Duration::from_nanos(current_count / frq)
|
||||
}
|
||||
|
||||
fn spin_for(&self, duration: Duration) {
|
||||
// Instantly return on zero.
|
||||
if duration.as_nanos() == 0 {
|
||||
return;
|
||||
}
|
||||
|
||||
// Calculate the register compare value.
|
||||
let frq = CNTFRQ_EL0.get() as u64;
|
||||
let x = match frq.checked_mul(duration.as_nanos() as u64) {
|
||||
None => {
|
||||
warn!("Spin duration too long, skipping");
|
||||
return;
|
||||
}
|
||||
Some(val) => val,
|
||||
};
|
||||
let tval = x / NS_PER_S;
|
||||
|
||||
// Check if it is within supported bounds.
|
||||
let warn: Option<&str> = if tval == 0 {
|
||||
Some("smaller")
|
||||
} else if tval > u32::max_value().into() {
|
||||
Some("bigger")
|
||||
} else {
|
||||
None
|
||||
};
|
||||
|
||||
if let Some(w) = warn {
|
||||
warn!(
|
||||
"Spin duration {} than architecturally supported, skipping",
|
||||
w
|
||||
);
|
||||
return;
|
||||
}
|
||||
|
||||
// Set the compare value register.
|
||||
CNTP_TVAL_EL0.set(tval as u32);
|
||||
|
||||
// Kick off the counting. // Disable timer interrupt.
|
||||
CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::SET);
|
||||
|
||||
// ISTATUS will be '1' when cval ticks have passed. Busy-check it.
|
||||
while !CNTP_CTL_EL0.matches_all(CNTP_CTL_EL0::ISTATUS::SET) {}
|
||||
|
||||
// Disable counting again.
|
||||
CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::CLEAR);
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,41 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2018-2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
//! Conditional exporting of Board Support Packages.
|
||||
|
||||
mod driver;
|
||||
|
||||
#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
|
||||
mod rpi;
|
||||
|
||||
#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
|
||||
pub use rpi::*;
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// Testing
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
|
||||
#[cfg(test)]
|
||||
mod tests {
|
||||
use super::*;
|
||||
use test_macros::kernel_test;
|
||||
|
||||
/// Ensure the kernel's virtual memory layout is free of overlaps.
|
||||
#[kernel_test]
|
||||
fn virt_mem_layout_has_no_overlaps() {
|
||||
let layout = virt_mem_layout().inner();
|
||||
|
||||
for (i, first) in layout.iter().enumerate() {
|
||||
for second in layout.iter().skip(i + 1) {
|
||||
let first_range = first.virtual_range;
|
||||
let second_range = second.virtual_range;
|
||||
|
||||
assert!(!first_range().contains(second_range().start()));
|
||||
assert!(!first_range().contains(second_range().end()));
|
||||
assert!(!second_range().contains(first_range().start()));
|
||||
assert!(!second_range().contains(first_range().end()));
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,11 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2018-2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
//! Drivers.
|
||||
|
||||
#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
|
||||
mod bcm;
|
||||
|
||||
#[cfg(any(feature = "bsp_rpi3", feature = "bsp_rpi4"))]
|
||||
pub use bcm::*;
|
||||
@ -0,0 +1,11 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2018-2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
//! BCM driver top level.
|
||||
|
||||
mod bcm2xxx_gpio;
|
||||
mod bcm2xxx_pl011_uart;
|
||||
|
||||
pub use bcm2xxx_gpio::GPIO;
|
||||
pub use bcm2xxx_pl011_uart::{PL011Uart, PanicUart};
|
||||
@ -0,0 +1,148 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2018-2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
//! GPIO driver.
|
||||
|
||||
use crate::{arch, arch::sync::NullLock, interface};
|
||||
use core::ops;
|
||||
use register::{mmio::*, register_bitfields, register_fields};
|
||||
|
||||
// Temporary workaround.
|
||||
use patches::register_structs;
|
||||
|
||||
// GPIO registers.
|
||||
//
|
||||
// Descriptions taken from
|
||||
// https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
|
||||
register_bitfields! {
|
||||
u32,
|
||||
|
||||
/// GPIO Function Select 1
|
||||
GPFSEL1 [
|
||||
/// Pin 15
|
||||
FSEL15 OFFSET(15) NUMBITS(3) [
|
||||
Input = 0b000,
|
||||
Output = 0b001,
|
||||
AltFunc0 = 0b100 // PL011 UART RX
|
||||
|
||||
],
|
||||
|
||||
/// Pin 14
|
||||
FSEL14 OFFSET(12) NUMBITS(3) [
|
||||
Input = 0b000,
|
||||
Output = 0b001,
|
||||
AltFunc0 = 0b100 // PL011 UART TX
|
||||
]
|
||||
],
|
||||
|
||||
/// GPIO Pull-up/down Clock Register 0
|
||||
GPPUDCLK0 [
|
||||
/// Pin 15
|
||||
PUDCLK15 OFFSET(15) NUMBITS(1) [
|
||||
NoEffect = 0,
|
||||
AssertClock = 1
|
||||
],
|
||||
|
||||
/// Pin 14
|
||||
PUDCLK14 OFFSET(14) NUMBITS(1) [
|
||||
NoEffect = 0,
|
||||
AssertClock = 1
|
||||
]
|
||||
]
|
||||
}
|
||||
|
||||
register_structs! {
|
||||
#[allow(non_snake_case)]
|
||||
RegisterBlock {
|
||||
(0x00 => GPFSEL0: ReadWrite<u32>),
|
||||
(0x04 => GPFSEL1: ReadWrite<u32, GPFSEL1::Register>),
|
||||
(0x08 => GPFSEL2: ReadWrite<u32>),
|
||||
(0x0C => GPFSEL3: ReadWrite<u32>),
|
||||
(0x10 => GPFSEL4: ReadWrite<u32>),
|
||||
(0x14 => GPFSEL5: ReadWrite<u32>),
|
||||
(0x18 => _reserved1),
|
||||
(0x94 => GPPUD: ReadWrite<u32>),
|
||||
(0x98 => GPPUDCLK0: ReadWrite<u32, GPPUDCLK0::Register>),
|
||||
(0x9C => GPPUDCLK1: ReadWrite<u32>),
|
||||
(0xA0 => @END),
|
||||
}
|
||||
}
|
||||
|
||||
/// The driver's private data.
|
||||
struct GPIOInner {
|
||||
base_addr: usize,
|
||||
}
|
||||
|
||||
/// Deref to RegisterBlock.
|
||||
impl ops::Deref for GPIOInner {
|
||||
type Target = RegisterBlock;
|
||||
|
||||
fn deref(&self) -> &Self::Target {
|
||||
unsafe { &*self.ptr() }
|
||||
}
|
||||
}
|
||||
|
||||
impl GPIOInner {
|
||||
const fn new(base_addr: usize) -> GPIOInner {
|
||||
GPIOInner { base_addr }
|
||||
}
|
||||
|
||||
/// Return a pointer to the register block.
|
||||
fn ptr(&self) -> *const RegisterBlock {
|
||||
self.base_addr as *const _
|
||||
}
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// BSP-public
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
use interface::sync::Mutex;
|
||||
|
||||
/// The driver's main struct.
|
||||
pub struct GPIO {
|
||||
inner: NullLock<GPIOInner>,
|
||||
}
|
||||
|
||||
impl GPIO {
|
||||
pub const unsafe fn new(base_addr: usize) -> GPIO {
|
||||
GPIO {
|
||||
inner: NullLock::new(GPIOInner::new(base_addr)),
|
||||
}
|
||||
}
|
||||
|
||||
/// Map PL011 UART as standard output.
|
||||
///
|
||||
/// TX to pin 14
|
||||
/// RX to pin 15
|
||||
pub fn map_pl011_uart(&self) {
|
||||
let mut r = &self.inner;
|
||||
r.lock(|inner| {
|
||||
// Map to pins.
|
||||
inner
|
||||
.GPFSEL1
|
||||
.modify(GPFSEL1::FSEL14::AltFunc0 + GPFSEL1::FSEL15::AltFunc0);
|
||||
|
||||
// Enable pins 14 and 15.
|
||||
inner.GPPUD.set(0);
|
||||
arch::spin_for_cycles(150);
|
||||
|
||||
inner
|
||||
.GPPUDCLK0
|
||||
.write(GPPUDCLK0::PUDCLK14::AssertClock + GPPUDCLK0::PUDCLK15::AssertClock);
|
||||
arch::spin_for_cycles(150);
|
||||
|
||||
inner.GPPUDCLK0.set(0);
|
||||
})
|
||||
}
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// OS interface implementations
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
|
||||
impl interface::driver::DeviceDriver for GPIO {
|
||||
fn compatible(&self) -> &str {
|
||||
"GPIO"
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,340 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2018-2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
//! PL011 UART driver.
|
||||
|
||||
use crate::{arch, arch::sync::NullLock, interface};
|
||||
use core::{fmt, ops};
|
||||
use register::{mmio::*, register_bitfields, register_fields};
|
||||
|
||||
// Temporary workaround.
|
||||
use patches::register_structs;
|
||||
|
||||
// PL011 UART registers.
|
||||
//
|
||||
// Descriptions taken from
|
||||
// https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
|
||||
register_bitfields! {
|
||||
u32,
|
||||
|
||||
/// Flag Register
|
||||
FR [
|
||||
/// Transmit FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
|
||||
/// Line Control Register, UARTLCR_ LCRH.
|
||||
///
|
||||
/// If the FIFO is disabled, this bit is set when the transmit holding register is empty. If
|
||||
/// the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty. This bit does
|
||||
/// not indicate if there is data in the transmit shift register.
|
||||
TXFE OFFSET(7) NUMBITS(1) [],
|
||||
|
||||
/// Transmit FIFO full. The meaning of this bit depends on the state of the FEN bit in the
|
||||
/// UARTLCR_ LCRH Register.
|
||||
///
|
||||
/// If the FIFO is disabled, this bit is set when the transmit holding register is full. If
|
||||
/// the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.
|
||||
TXFF OFFSET(5) NUMBITS(1) [],
|
||||
|
||||
/// Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the
|
||||
/// UARTLCR_H Register.
|
||||
///
|
||||
/// If the FIFO is disabled, this bit is set when the receive holding register is empty. If
|
||||
/// the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.
|
||||
RXFE OFFSET(4) NUMBITS(1) []
|
||||
],
|
||||
|
||||
/// Integer Baud rate divisor
|
||||
IBRD [
|
||||
/// Integer Baud rate divisor
|
||||
IBRD OFFSET(0) NUMBITS(16) []
|
||||
],
|
||||
|
||||
/// Fractional Baud rate divisor
|
||||
FBRD [
|
||||
/// Fractional Baud rate divisor
|
||||
FBRD OFFSET(0) NUMBITS(6) []
|
||||
],
|
||||
|
||||
/// Line Control register
|
||||
LCRH [
|
||||
/// Word length. These bits indicate the number of data bits transmitted or received in a
|
||||
/// frame.
|
||||
WLEN OFFSET(5) NUMBITS(2) [
|
||||
FiveBit = 0b00,
|
||||
SixBit = 0b01,
|
||||
SevenBit = 0b10,
|
||||
EightBit = 0b11
|
||||
],
|
||||
|
||||
/// Enable FIFOs:
|
||||
///
|
||||
/// 0 = FIFOs are disabled (character mode) that is, the FIFOs become 1-byte-deep holding
|
||||
/// registers
|
||||
///
|
||||
/// 1 = transmit and receive FIFO buffers are enabled (FIFO mode).
|
||||
FEN OFFSET(4) NUMBITS(1) [
|
||||
FifosDisabled = 0,
|
||||
FifosEnabled = 1
|
||||
]
|
||||
],
|
||||
|
||||
/// Control Register
|
||||
CR [
|
||||
/// Receive enable. If this bit is set to 1, the receive section of the UART is enabled.
|
||||
/// Data reception occurs for UART signals. When the UART is disabled in the middle of
|
||||
/// reception, it completes the current character before stopping.
|
||||
RXE OFFSET(9) NUMBITS(1) [
|
||||
Disabled = 0,
|
||||
Enabled = 1
|
||||
],
|
||||
|
||||
/// Transmit enable. If this bit is set to 1, the transmit section of the UART is enabled.
|
||||
/// Data transmission occurs for UART signals. When the UART is disabled in the middle of
|
||||
/// transmission, it completes the current character before stopping.
|
||||
TXE OFFSET(8) NUMBITS(1) [
|
||||
Disabled = 0,
|
||||
Enabled = 1
|
||||
],
|
||||
|
||||
/// UART enable
|
||||
UARTEN OFFSET(0) NUMBITS(1) [
|
||||
/// If the UART is disabled in the middle of transmission or reception, it completes the
|
||||
/// current character before stopping.
|
||||
Disabled = 0,
|
||||
Enabled = 1
|
||||
]
|
||||
],
|
||||
|
||||
/// Interrupt Clear Register
|
||||
ICR [
|
||||
/// Meta field for all pending interrupts
|
||||
ALL OFFSET(0) NUMBITS(11) []
|
||||
]
|
||||
}
|
||||
|
||||
register_structs! {
|
||||
#[allow(non_snake_case)]
|
||||
RegisterBlock {
|
||||
(0x00 => DR: ReadWrite<u32>),
|
||||
(0x04 => _reserved1),
|
||||
(0x18 => FR: ReadOnly<u32, FR::Register>),
|
||||
(0x1c => _reserved2),
|
||||
(0x24 => IBRD: WriteOnly<u32, IBRD::Register>),
|
||||
(0x28 => FBRD: WriteOnly<u32, FBRD::Register>),
|
||||
(0x2c => LCRH: WriteOnly<u32, LCRH::Register>),
|
||||
(0x30 => CR: WriteOnly<u32, CR::Register>),
|
||||
(0x34 => _reserved3),
|
||||
(0x44 => ICR: WriteOnly<u32, ICR::Register>),
|
||||
(0x48 => @END),
|
||||
}
|
||||
}
|
||||
|
||||
/// The driver's mutex protected part.
|
||||
pub struct PL011UartInner {
|
||||
base_addr: usize,
|
||||
chars_written: usize,
|
||||
chars_read: usize,
|
||||
}
|
||||
|
||||
/// Deref to RegisterBlock.
|
||||
///
|
||||
/// Allows writing
|
||||
/// ```
|
||||
/// self.DR.read()
|
||||
/// ```
|
||||
/// instead of something along the lines of
|
||||
/// ```
|
||||
/// unsafe { (*PL011UartInner::ptr()).DR.read() }
|
||||
/// ```
|
||||
impl ops::Deref for PL011UartInner {
|
||||
type Target = RegisterBlock;
|
||||
|
||||
fn deref(&self) -> &Self::Target {
|
||||
unsafe { &*self.ptr() }
|
||||
}
|
||||
}
|
||||
|
||||
impl PL011UartInner {
|
||||
pub const unsafe fn new(base_addr: usize) -> PL011UartInner {
|
||||
PL011UartInner {
|
||||
base_addr,
|
||||
chars_written: 0,
|
||||
chars_read: 0,
|
||||
}
|
||||
}
|
||||
|
||||
/// Set up baud rate and characteristics.
|
||||
///
|
||||
/// Results in 8N1 and 115200 baud (if the clk has been previously set to 4 MHz by the
|
||||
/// firmware).
|
||||
pub fn init(&self) {
|
||||
// Turn it off temporarily.
|
||||
self.CR.set(0);
|
||||
|
||||
self.ICR.write(ICR::ALL::CLEAR);
|
||||
self.IBRD.write(IBRD::IBRD.val(26)); // Results in 115200 baud for UART Clk of 48 MHz.
|
||||
self.FBRD.write(FBRD::FBRD.val(3));
|
||||
self.LCRH
|
||||
.write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
|
||||
self.CR
|
||||
.write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
|
||||
}
|
||||
|
||||
/// Return a pointer to the register block.
|
||||
fn ptr(&self) -> *const RegisterBlock {
|
||||
self.base_addr as *const _
|
||||
}
|
||||
|
||||
/// Send a character.
|
||||
fn write_char(&mut self, c: char) {
|
||||
// Spin while TX FIFO full is set, waiting for an empty slot.
|
||||
while self.FR.matches_all(FR::TXFF::SET) {
|
||||
arch::nop();
|
||||
}
|
||||
|
||||
// Write the character to the buffer.
|
||||
self.DR.set(c as u32);
|
||||
}
|
||||
}
|
||||
|
||||
/// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
|
||||
/// used to implement the `kernel`'s `print!` and `println!` macros. By implementing `write_str()`,
|
||||
/// we get `write_fmt()` automatically.
|
||||
///
|
||||
/// The function takes an `&mut self`, so it must be implemented for the inner struct.
|
||||
///
|
||||
/// See [`src/print.rs`].
|
||||
///
|
||||
/// [`src/print.rs`]: ../../print/index.html
|
||||
impl fmt::Write for PL011UartInner {
|
||||
fn write_str(&mut self, s: &str) -> fmt::Result {
|
||||
for c in s.chars() {
|
||||
// Convert newline to carrige return + newline.
|
||||
if c == '\n' {
|
||||
self.write_char('\r')
|
||||
}
|
||||
|
||||
self.write_char(c);
|
||||
}
|
||||
|
||||
self.chars_written += s.len();
|
||||
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// Export the inner struct so that BSPs can use it for the panic handler
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
pub use PL011UartInner as PanicUart;
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// BSP-public
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
|
||||
/// The driver's main struct.
|
||||
pub struct PL011Uart {
|
||||
inner: NullLock<PL011UartInner>,
|
||||
}
|
||||
|
||||
impl PL011Uart {
|
||||
/// # Safety
|
||||
///
|
||||
/// The user must ensure to provide the correct `base_addr`.
|
||||
pub const unsafe fn new(base_addr: usize) -> PL011Uart {
|
||||
PL011Uart {
|
||||
inner: NullLock::new(PL011UartInner::new(base_addr)),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// OS interface implementations
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
use interface::sync::Mutex;
|
||||
|
||||
impl interface::driver::DeviceDriver for PL011Uart {
|
||||
fn compatible(&self) -> &str {
|
||||
"PL011Uart"
|
||||
}
|
||||
|
||||
fn init(&self) -> interface::driver::Result {
|
||||
let mut r = &self.inner;
|
||||
r.lock(|inner| inner.init());
|
||||
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
|
||||
impl interface::console::Write for PL011Uart {
|
||||
/// Passthrough of `args` to the `core::fmt::Write` implementation, but guarded by a Mutex to
|
||||
/// serialize access.
|
||||
fn write_char(&self, c: char) {
|
||||
let mut r = &self.inner;
|
||||
r.lock(|inner| inner.write_char(c));
|
||||
}
|
||||
|
||||
fn write_fmt(&self, args: core::fmt::Arguments) -> fmt::Result {
|
||||
// Fully qualified syntax for the call to `core::fmt::Write::write:fmt()` to increase
|
||||
// readability.
|
||||
let mut r = &self.inner;
|
||||
r.lock(|inner| fmt::Write::write_fmt(inner, args))
|
||||
}
|
||||
|
||||
fn flush(&self) {
|
||||
let mut r = &self.inner;
|
||||
// Spin until TX FIFO empty is set.
|
||||
r.lock(|inner| {
|
||||
while !inner.FR.matches_all(FR::TXFE::SET) {
|
||||
arch::nop();
|
||||
}
|
||||
});
|
||||
}
|
||||
}
|
||||
|
||||
impl interface::console::Read for PL011Uart {
|
||||
fn read_char(&self) -> char {
|
||||
let mut r = &self.inner;
|
||||
r.lock(|inner| {
|
||||
// Spin while RX FIFO empty is set.
|
||||
while inner.FR.matches_all(FR::RXFE::SET) {
|
||||
arch::nop();
|
||||
}
|
||||
|
||||
// Read one character.
|
||||
let mut ret = inner.DR.get() as u8 as char;
|
||||
|
||||
// Convert carrige return to newline.
|
||||
if ret == '\r' {
|
||||
ret = '\n'
|
||||
}
|
||||
|
||||
// Update statistics.
|
||||
inner.chars_read += 1;
|
||||
|
||||
ret
|
||||
})
|
||||
}
|
||||
|
||||
fn clear(&self) {
|
||||
let mut r = &self.inner;
|
||||
r.lock(|inner| {
|
||||
// Read from the RX FIFO until it is indicating empty.
|
||||
while !inner.FR.matches_all(FR::RXFE::SET) {
|
||||
inner.DR.get();
|
||||
}
|
||||
})
|
||||
}
|
||||
}
|
||||
|
||||
impl interface::console::Statistics for PL011Uart {
|
||||
fn chars_written(&self) -> usize {
|
||||
let mut r = &self.inner;
|
||||
r.lock(|inner| inner.chars_written)
|
||||
}
|
||||
|
||||
fn chars_read(&self) -> usize {
|
||||
let mut r = &self.inner;
|
||||
r.lock(|inner| inner.chars_read)
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,95 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2018-2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
//! Board Support Package for the Raspberry Pi.
|
||||
|
||||
mod memory_map;
|
||||
mod virt_mem_layout;
|
||||
|
||||
use super::driver;
|
||||
use crate::{interface, memory::KernelVirtualLayout};
|
||||
use core::fmt;
|
||||
|
||||
/// Used by `arch` code to find the early boot core.
|
||||
pub const BOOT_CORE_ID: u64 = 0;
|
||||
|
||||
/// The early boot core's stack address.
|
||||
pub const BOOT_CORE_STACK_START: u64 = 0x80_000;
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// Global BSP driver instances
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
|
||||
static GPIO: driver::GPIO = unsafe { driver::GPIO::new(memory_map::mmio::GPIO_BASE) };
|
||||
static PL011_UART: driver::PL011Uart =
|
||||
unsafe { driver::PL011Uart::new(memory_map::mmio::PL011_UART_BASE) };
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// Implementation of the kernel's BSP calls
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
|
||||
/// Board identification.
|
||||
pub fn board_name() -> &'static str {
|
||||
#[cfg(feature = "bsp_rpi3")]
|
||||
{
|
||||
"Raspberry Pi 3"
|
||||
}
|
||||
|
||||
#[cfg(feature = "bsp_rpi4")]
|
||||
{
|
||||
"Raspberry Pi 4"
|
||||
}
|
||||
}
|
||||
|
||||
/// Return a reference to a `console::All` implementation.
|
||||
pub fn console() -> &'static impl interface::console::All {
|
||||
&PL011_UART
|
||||
}
|
||||
|
||||
/// In case of a panic, the panic handler uses this function to take a last shot at printing
|
||||
/// something before the system is halted.
|
||||
///
|
||||
/// # Safety
|
||||
///
|
||||
/// - Use only for printing during a panic.
|
||||
pub unsafe fn panic_console_out() -> impl fmt::Write {
|
||||
let uart = driver::PanicUart::new(memory_map::mmio::PL011_UART_BASE);
|
||||
uart.init();
|
||||
uart
|
||||
}
|
||||
|
||||
/// Return an array of references to all `DeviceDriver` compatible `BSP` drivers.
|
||||
///
|
||||
/// # Safety
|
||||
///
|
||||
/// The order of devices is the order in which `DeviceDriver::init()` is called.
|
||||
pub fn device_drivers() -> [&'static dyn interface::driver::DeviceDriver; 2] {
|
||||
[&GPIO, &PL011_UART]
|
||||
}
|
||||
|
||||
/// BSP initialization code that runs after driver init.
|
||||
pub fn post_driver_init() {
|
||||
// Configure PL011Uart's output pins.
|
||||
GPIO.map_pl011_uart();
|
||||
}
|
||||
|
||||
/// Return the address space size in bytes.
|
||||
pub const fn addr_space_size() -> usize {
|
||||
memory_map::END_INCLUSIVE + 1
|
||||
}
|
||||
|
||||
/// Return a reference to the virtual memory layout.
|
||||
pub fn virt_mem_layout() -> &'static KernelVirtualLayout<{ virt_mem_layout::NUM_MEM_RANGES }> {
|
||||
&virt_mem_layout::LAYOUT
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// Testing
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
|
||||
/// Minimal code needed to bring up the console in QEMU (for testing only). This is often less steps
|
||||
/// than on real hardware due to QEMU's abstractions.
|
||||
///
|
||||
/// For the RPi, nothing needs to be done.
|
||||
pub fn qemu_bring_up_console() {}
|
||||
@ -0,0 +1,38 @@
|
||||
/* SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
*
|
||||
* Copyright (c) 2018-2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
*/
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* Set current address to the value from which the RPi starts execution */
|
||||
. = 0x80000;
|
||||
|
||||
__ro_start = .;
|
||||
.text :
|
||||
{
|
||||
*(.text._start) *(.text*)
|
||||
}
|
||||
|
||||
.rodata :
|
||||
{
|
||||
*(.rodata*)
|
||||
}
|
||||
. = ALIGN(65536); /* Fill up to 64 KiB */
|
||||
__ro_end = .;
|
||||
|
||||
.data :
|
||||
{
|
||||
*(.data*)
|
||||
}
|
||||
|
||||
/* Align to 8 byte boundary */
|
||||
.bss ALIGN(8):
|
||||
{
|
||||
__bss_start = .;
|
||||
*(.bss*);
|
||||
__bss_end = .;
|
||||
}
|
||||
|
||||
/DISCARD/ : { *(.comment*) }
|
||||
}
|
||||
@ -0,0 +1,27 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2018-2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
//! The board's memory map.
|
||||
|
||||
#[cfg(feature = "bsp_rpi3")]
|
||||
#[rustfmt::skip]
|
||||
pub const END_INCLUSIVE: usize = 0x3FFF_FFFF;
|
||||
|
||||
#[cfg(feature = "bsp_rpi4")]
|
||||
#[rustfmt::skip]
|
||||
pub const END_INCLUSIVE: usize = 0xFFFF_FFFF;
|
||||
|
||||
/// Physical devices.
|
||||
#[rustfmt::skip]
|
||||
pub mod mmio {
|
||||
#[cfg(feature = "bsp_rpi3")]
|
||||
pub const BASE: usize = 0x3F00_0000;
|
||||
|
||||
#[cfg(feature = "bsp_rpi4")]
|
||||
pub const BASE: usize = 0xFE00_0000;
|
||||
|
||||
pub const GPIO_BASE: usize = BASE + 0x0020_0000;
|
||||
pub const PL011_UART_BASE: usize = BASE + 0x0020_1000;
|
||||
pub const END_INCLUSIVE: usize = super::END_INCLUSIVE;
|
||||
}
|
||||
@ -0,0 +1,69 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2018-2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
//! The virtual memory layout.
|
||||
//!
|
||||
//! The layout must contain only special ranges, aka anything that is _not_ normal cacheable DRAM.
|
||||
//! It is agnostic of the paging granularity that the architecture's MMU will use.
|
||||
|
||||
use super::memory_map;
|
||||
use crate::memory::*;
|
||||
use core::ops::RangeInclusive;
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// BSP-public
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
|
||||
pub const NUM_MEM_RANGES: usize = 2;
|
||||
|
||||
pub static LAYOUT: KernelVirtualLayout<{ NUM_MEM_RANGES }> = KernelVirtualLayout::new(
|
||||
memory_map::END_INCLUSIVE,
|
||||
[
|
||||
RangeDescriptor {
|
||||
name: "Kernel code and RO data",
|
||||
virtual_range: || {
|
||||
// Using the linker script, we ensure that the RO area is consecutive and 4 KiB
|
||||
// aligned, and we export the boundaries via symbols:
|
||||
//
|
||||
// [__ro_start, __ro_end)
|
||||
extern "C" {
|
||||
// The inclusive start of the read-only area, aka the address of the first
|
||||
// byte of the area.
|
||||
static __ro_start: u64;
|
||||
|
||||
// The exclusive end of the read-only area, aka the address of the first
|
||||
// byte _after_ the RO area.
|
||||
static __ro_end: u64;
|
||||
}
|
||||
|
||||
unsafe {
|
||||
// Notice the subtraction to turn the exclusive end into an inclusive end.
|
||||
#[allow(clippy::range_minus_one)]
|
||||
RangeInclusive::new(
|
||||
&__ro_start as *const _ as usize,
|
||||
&__ro_end as *const _ as usize - 1,
|
||||
)
|
||||
}
|
||||
},
|
||||
translation: Translation::Identity,
|
||||
attribute_fields: AttributeFields {
|
||||
mem_attributes: MemAttributes::CacheableDRAM,
|
||||
acc_perms: AccessPermissions::ReadOnly,
|
||||
execute_never: false,
|
||||
},
|
||||
},
|
||||
RangeDescriptor {
|
||||
name: "Device MMIO",
|
||||
virtual_range: || {
|
||||
RangeInclusive::new(memory_map::mmio::BASE, memory_map::mmio::END_INCLUSIVE)
|
||||
},
|
||||
translation: Translation::Identity,
|
||||
attribute_fields: AttributeFields {
|
||||
mem_attributes: MemAttributes::Device,
|
||||
acc_perms: AccessPermissions::ReadWrite,
|
||||
execute_never: true,
|
||||
},
|
||||
},
|
||||
],
|
||||
);
|
||||
@ -0,0 +1,142 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2018-2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
//! Trait definitions for coupling `kernel` and `BSP` code.
|
||||
//!
|
||||
//! ```
|
||||
//! +-------------------+
|
||||
//! | Interface (Trait) |
|
||||
//! | |
|
||||
//! +--+-------------+--+
|
||||
//! ^ ^
|
||||
//! | |
|
||||
//! | |
|
||||
//! +----------+--+ +--+----------+
|
||||
//! | Kernel code | | BSP Code |
|
||||
//! | | | |
|
||||
//! +-------------+ +-------------+
|
||||
//! ```
|
||||
|
||||
/// System console operations.
|
||||
pub mod console {
|
||||
use core::fmt;
|
||||
|
||||
/// Console write functions.
|
||||
pub trait Write {
|
||||
/// Write a single character.
|
||||
fn write_char(&self, c: char);
|
||||
|
||||
/// Write a Rust format string.
|
||||
fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
|
||||
|
||||
/// Block execution until the last character has been physically put on the TX wire
|
||||
/// (draining TX buffers/FIFOs, if any).
|
||||
fn flush(&self);
|
||||
}
|
||||
|
||||
/// Console read functions.
|
||||
pub trait Read {
|
||||
/// Read a single character.
|
||||
fn read_char(&self) -> char {
|
||||
' '
|
||||
}
|
||||
|
||||
/// Clear RX buffers, if any.
|
||||
fn clear(&self);
|
||||
}
|
||||
|
||||
/// Console statistics.
|
||||
pub trait Statistics {
|
||||
/// Return the number of characters written.
|
||||
fn chars_written(&self) -> usize {
|
||||
0
|
||||
}
|
||||
|
||||
/// Return the number of characters read.
|
||||
fn chars_read(&self) -> usize {
|
||||
0
|
||||
}
|
||||
}
|
||||
|
||||
/// Trait alias for a full-fledged console.
|
||||
pub trait All = Write + Read + Statistics;
|
||||
}
|
||||
|
||||
/// Synchronization primitives.
|
||||
pub mod sync {
|
||||
/// Any object implementing this trait guarantees exclusive access to the data contained within
|
||||
/// the mutex for the duration of the lock.
|
||||
///
|
||||
/// The trait follows the [Rust embedded WG's
|
||||
/// proposal](https://github.com/korken89/wg/blob/master/rfcs/0377-mutex-trait.md) and therefore
|
||||
/// provides some goodness such as [deadlock
|
||||
/// prevention](https://github.com/korken89/wg/blob/master/rfcs/0377-mutex-trait.md#design-decisions-and-compatibility).
|
||||
///
|
||||
/// # Example
|
||||
///
|
||||
/// Since the lock function takes an `&mut self` to enable deadlock-prevention, the trait is
|
||||
/// best implemented **for a reference to a container struct**, and has a usage pattern that
|
||||
/// might feel strange at first:
|
||||
///
|
||||
/// ```
|
||||
/// static MUT: Mutex<RefCell<i32>> = Mutex::new(RefCell::new(0));
|
||||
///
|
||||
/// fn foo() {
|
||||
/// let mut r = &MUT; // Note that r is mutable
|
||||
/// r.lock(|data| *data += 1);
|
||||
/// }
|
||||
/// ```
|
||||
pub trait Mutex {
|
||||
/// Type of data encapsulated by the mutex.
|
||||
type Data;
|
||||
|
||||
/// Creates a critical section and grants temporary mutable access to the encapsulated data.
|
||||
fn lock<R>(&mut self, f: impl FnOnce(&mut Self::Data) -> R) -> R;
|
||||
}
|
||||
}
|
||||
|
||||
/// Driver interfaces.
|
||||
pub mod driver {
|
||||
/// Driver result type, e.g. for indicating successful driver init.
|
||||
pub type Result = core::result::Result<(), ()>;
|
||||
|
||||
/// Device Driver functions.
|
||||
pub trait DeviceDriver {
|
||||
/// Return a compatibility string for identifying the driver.
|
||||
fn compatible(&self) -> &str;
|
||||
|
||||
/// Called by the kernel to bring up the device.
|
||||
fn init(&self) -> Result {
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/// Timekeeping interfaces.
|
||||
pub mod time {
|
||||
use core::time::Duration;
|
||||
|
||||
/// Timer functions.
|
||||
pub trait Timer {
|
||||
/// The timer's resolution.
|
||||
fn resolution(&self) -> Duration;
|
||||
|
||||
/// The uptime since power-on of the device.
|
||||
///
|
||||
/// This includes time consumed by firmware and bootloaders.
|
||||
fn uptime(&self) -> Duration;
|
||||
|
||||
/// Spin for a given duration.
|
||||
fn spin_for(&self, duration: Duration);
|
||||
}
|
||||
}
|
||||
|
||||
/// Memory Management interfaces.
|
||||
pub mod mm {
|
||||
/// MMU functions.
|
||||
pub trait MMU {
|
||||
/// Called by the kernel early during init.
|
||||
unsafe fn init(&self) -> Result<(), &'static str>;
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,69 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2018-2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
// Rust embedded logo for `make doc`.
|
||||
#![doc(html_logo_url = "https://git.io/JeGIp")]
|
||||
|
||||
//! The `kernel` library.
|
||||
//!
|
||||
//! Used by `main.rs` to compose the final kernel binary.
|
||||
|
||||
#![allow(incomplete_features)]
|
||||
#![feature(const_generics)]
|
||||
#![feature(format_args_nl)]
|
||||
#![feature(global_asm)]
|
||||
#![feature(linkage)]
|
||||
#![feature(panic_info_message)]
|
||||
#![feature(trait_alias)]
|
||||
#![no_std]
|
||||
// Testing
|
||||
#![cfg_attr(test, no_main)]
|
||||
#![feature(custom_test_frameworks)]
|
||||
#![reexport_test_harness_main = "test_main"]
|
||||
#![test_runner(crate::test_runner)]
|
||||
|
||||
// Conditionally includes the selected `architecture` code, which provides the `_start()` function,
|
||||
// the first function to run.
|
||||
pub mod arch;
|
||||
|
||||
// `_start()` then calls `runtime_init()`, which on completion, jumps to `kernel_init()`.
|
||||
mod runtime_init;
|
||||
|
||||
// Conditionally includes the selected `BSP` code.
|
||||
pub mod bsp;
|
||||
|
||||
pub mod interface;
|
||||
mod memory;
|
||||
mod panic_wait;
|
||||
pub mod print;
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// Testing
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
|
||||
/// The default runner for unit tests.
|
||||
pub fn test_runner(tests: &[&test_types::UnitTest]) {
|
||||
println!("Running {} tests", tests.len());
|
||||
println!("-------------------------------------------------------------------\n");
|
||||
for (i, test) in tests.iter().enumerate() {
|
||||
print!("{:>3}. {:.<58}", i + 1, test.name);
|
||||
|
||||
// Run the actual test.
|
||||
(test.test_func)();
|
||||
|
||||
// Failed tests call panic!(). Execution reaches here only if the test has passed.
|
||||
println!("[ok]")
|
||||
}
|
||||
}
|
||||
|
||||
/// The `kernel_init()` for unit tests. Called from `runtime_init()`.
|
||||
#[cfg(test)]
|
||||
#[no_mangle]
|
||||
unsafe fn kernel_init() -> ! {
|
||||
bsp::qemu_bring_up_console();
|
||||
|
||||
test_main();
|
||||
|
||||
arch::qemu_exit_success()
|
||||
}
|
||||
@ -0,0 +1,93 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2018-2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
// Rust embedded logo for `make doc`.
|
||||
#![doc(html_logo_url = "https://git.io/JeGIp")]
|
||||
|
||||
//! The `kernel` binary.
|
||||
//!
|
||||
//! The `kernel` is composed by glueing together code from
|
||||
//!
|
||||
//! - [Hardware-specific Board Support Packages] (`BSPs`).
|
||||
//! - [Architecture-specific code].
|
||||
//! - HW- and architecture-agnostic `kernel` code.
|
||||
//!
|
||||
//! using the [`kernel::interface`] traits.
|
||||
//!
|
||||
//! [Hardware-specific Board Support Packages]: bsp/index.html
|
||||
//! [Architecture-specific code]: arch/index.html
|
||||
//! [`kernel::interface`]: interface/index.html
|
||||
|
||||
#![feature(format_args_nl)]
|
||||
#![no_main]
|
||||
#![no_std]
|
||||
|
||||
use libkernel::{arch, bsp, info, interface};
|
||||
|
||||
/// Early init code.
|
||||
///
|
||||
/// Concerned with with initializing `BSP` and `arch` parts.
|
||||
///
|
||||
/// # Safety
|
||||
///
|
||||
/// - Only a single core must be active and running this function.
|
||||
/// - The init calls in this function must appear in the correct order:
|
||||
/// - Virtual memory must be activated before the device drivers.
|
||||
/// - Without it, any atomic operations, e.g. the yet-to-be-introduced spinlocks in the device
|
||||
/// drivers (which currently employ NullLocks instead of spinlocks), will fail to work on
|
||||
/// the RPi SoCs.
|
||||
#[no_mangle]
|
||||
unsafe fn kernel_init() -> ! {
|
||||
use interface::mm::MMU;
|
||||
|
||||
arch::enable_exception_handling();
|
||||
|
||||
if let Err(string) = arch::mmu().init() {
|
||||
panic!("MMU: {}", string);
|
||||
}
|
||||
|
||||
for i in bsp::device_drivers().iter() {
|
||||
if let Err(()) = i.init() {
|
||||
panic!("Error loading driver: {}", i.compatible())
|
||||
}
|
||||
}
|
||||
bsp::post_driver_init();
|
||||
// println! is usable from here on.
|
||||
|
||||
// Transition from unsafe to safe.
|
||||
kernel_main()
|
||||
}
|
||||
|
||||
/// The main function running after the early init.
|
||||
fn kernel_main() -> ! {
|
||||
use interface::console::All;
|
||||
|
||||
info!("Booting on: {}", bsp::board_name());
|
||||
|
||||
info!("MMU online. Special regions:");
|
||||
bsp::virt_mem_layout().print_layout();
|
||||
|
||||
let (_, privilege_level) = arch::state::current_privilege_level();
|
||||
info!("Current privilege level: {}", privilege_level);
|
||||
|
||||
info!("Exception handling state:");
|
||||
arch::state::print_exception_state();
|
||||
|
||||
info!(
|
||||
"Architectural timer resolution: {} ns",
|
||||
arch::timer().resolution().as_nanos()
|
||||
);
|
||||
|
||||
info!("Drivers loaded:");
|
||||
for (i, driver) in bsp::device_drivers().iter().enumerate() {
|
||||
info!(" {}. {}", i + 1, driver.compatible());
|
||||
}
|
||||
|
||||
// Will never reach here in this tutorial.
|
||||
info!("Echoing input now");
|
||||
loop {
|
||||
let c = bsp::console().read_char();
|
||||
bsp::console().write_char(c);
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,152 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2018-2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
//! Memory Management.
|
||||
|
||||
use core::{fmt, ops::RangeInclusive};
|
||||
|
||||
#[derive(Copy, Clone)]
|
||||
pub enum Translation {
|
||||
Identity,
|
||||
Offset(usize),
|
||||
}
|
||||
|
||||
#[derive(Copy, Clone)]
|
||||
pub enum MemAttributes {
|
||||
CacheableDRAM,
|
||||
Device,
|
||||
}
|
||||
|
||||
#[derive(Copy, Clone)]
|
||||
pub enum AccessPermissions {
|
||||
ReadOnly,
|
||||
ReadWrite,
|
||||
}
|
||||
|
||||
#[derive(Copy, Clone)]
|
||||
pub struct AttributeFields {
|
||||
pub mem_attributes: MemAttributes,
|
||||
pub acc_perms: AccessPermissions,
|
||||
pub execute_never: bool,
|
||||
}
|
||||
|
||||
impl Default for AttributeFields {
|
||||
fn default() -> AttributeFields {
|
||||
AttributeFields {
|
||||
mem_attributes: MemAttributes::CacheableDRAM,
|
||||
acc_perms: AccessPermissions::ReadWrite,
|
||||
execute_never: true,
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/// An architecture agnostic descriptor for a memory range.
|
||||
pub struct RangeDescriptor {
|
||||
pub name: &'static str,
|
||||
pub virtual_range: fn() -> RangeInclusive<usize>,
|
||||
pub translation: Translation,
|
||||
pub attribute_fields: AttributeFields,
|
||||
}
|
||||
|
||||
/// Human-readable output of a RangeDescriptor.
|
||||
impl fmt::Display for RangeDescriptor {
|
||||
fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
|
||||
// Call the function to which self.range points, and dereference the result, which causes
|
||||
// Rust to copy the value.
|
||||
let start = *(self.virtual_range)().start();
|
||||
let end = *(self.virtual_range)().end();
|
||||
let size = end - start + 1;
|
||||
|
||||
// log2(1024).
|
||||
const KIB_RSHIFT: u32 = 10;
|
||||
|
||||
// log2(1024 * 1024).
|
||||
const MIB_RSHIFT: u32 = 20;
|
||||
|
||||
let (size, unit) = if (size >> MIB_RSHIFT) > 0 {
|
||||
(size >> MIB_RSHIFT, "MiB")
|
||||
} else if (size >> KIB_RSHIFT) > 0 {
|
||||
(size >> KIB_RSHIFT, "KiB")
|
||||
} else {
|
||||
(size, "Byte")
|
||||
};
|
||||
|
||||
let attr = match self.attribute_fields.mem_attributes {
|
||||
MemAttributes::CacheableDRAM => "C",
|
||||
MemAttributes::Device => "Dev",
|
||||
};
|
||||
|
||||
let acc_p = match self.attribute_fields.acc_perms {
|
||||
AccessPermissions::ReadOnly => "RO",
|
||||
AccessPermissions::ReadWrite => "RW",
|
||||
};
|
||||
|
||||
let xn = if self.attribute_fields.execute_never {
|
||||
"PXN"
|
||||
} else {
|
||||
"PX"
|
||||
};
|
||||
|
||||
write!(
|
||||
f,
|
||||
" {:#010x} - {:#010x} | {: >3} {} | {: <3} {} {: <3} | {}",
|
||||
start, end, size, unit, attr, acc_p, xn, self.name
|
||||
)
|
||||
}
|
||||
}
|
||||
|
||||
/// Type for expressing the kernel's virtual memory layout.
|
||||
pub struct KernelVirtualLayout<const NUM_SPECIAL_RANGES: usize> {
|
||||
max_virt_addr_inclusive: usize,
|
||||
inner: [RangeDescriptor; NUM_SPECIAL_RANGES],
|
||||
}
|
||||
|
||||
impl<const NUM_SPECIAL_RANGES: usize> KernelVirtualLayout<{ NUM_SPECIAL_RANGES }> {
|
||||
pub const fn new(max: usize, layout: [RangeDescriptor; NUM_SPECIAL_RANGES]) -> Self {
|
||||
Self {
|
||||
max_virt_addr_inclusive: max,
|
||||
inner: layout,
|
||||
}
|
||||
}
|
||||
|
||||
/// For a virtual address, find and return the output address and corresponding attributes.
|
||||
///
|
||||
/// If the address is not found in `inner`, return an identity mapped default with normal
|
||||
/// cacheable DRAM attributes.
|
||||
pub fn get_virt_addr_properties(
|
||||
&self,
|
||||
virt_addr: usize,
|
||||
) -> Result<(usize, AttributeFields), &'static str> {
|
||||
if virt_addr > self.max_virt_addr_inclusive {
|
||||
return Err("Address out of range");
|
||||
}
|
||||
|
||||
for i in self.inner.iter() {
|
||||
if (i.virtual_range)().contains(&virt_addr) {
|
||||
let output_addr = match i.translation {
|
||||
Translation::Identity => virt_addr,
|
||||
Translation::Offset(a) => a + (virt_addr - (i.virtual_range)().start()),
|
||||
};
|
||||
|
||||
return Ok((output_addr, i.attribute_fields));
|
||||
}
|
||||
}
|
||||
|
||||
Ok((virt_addr, AttributeFields::default()))
|
||||
}
|
||||
|
||||
/// Print the memory layout.
|
||||
pub fn print_layout(&self) {
|
||||
use crate::info;
|
||||
|
||||
for i in self.inner.iter() {
|
||||
info!("{}", i);
|
||||
}
|
||||
}
|
||||
|
||||
#[cfg(test)]
|
||||
pub fn inner(&self) -> &[RangeDescriptor; NUM_SPECIAL_RANGES] {
|
||||
&self.inner
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,63 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2018-2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
//! A panic handler that infinitely waits.
|
||||
|
||||
use crate::{arch, bsp};
|
||||
use core::{fmt, panic::PanicInfo};
|
||||
|
||||
fn _panic_print(args: fmt::Arguments) {
|
||||
use fmt::Write;
|
||||
|
||||
unsafe { bsp::panic_console_out().write_fmt(args).unwrap() };
|
||||
}
|
||||
|
||||
/// Prints with a newline - only use from the panic handler.
|
||||
///
|
||||
/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
|
||||
#[macro_export]
|
||||
macro_rules! panic_println {
|
||||
($($arg:tt)*) => ({
|
||||
_panic_print(format_args_nl!($($arg)*));
|
||||
})
|
||||
}
|
||||
|
||||
/// The point of exit for the "standard" (non-testing) `libkernel`.
|
||||
///
|
||||
/// This code will be used by the release kernel binary and the `integration tests`. It is linked
|
||||
/// weakly, so that the integration tests can overload it to exit `QEMU` instead of spinning
|
||||
/// forever.
|
||||
///
|
||||
/// This is one possible approach to solve the problem that `cargo` can not know who the consumer of
|
||||
/// the library will be:
|
||||
/// - The release kernel binary that should safely park the paniced core,
|
||||
/// - or an `integration test` that is executed in QEMU, which should just exit QEMU.
|
||||
#[cfg(not(test))]
|
||||
#[linkage = "weak"]
|
||||
#[no_mangle]
|
||||
fn _panic_exit() -> ! {
|
||||
arch::wait_forever()
|
||||
}
|
||||
|
||||
#[panic_handler]
|
||||
fn panic(info: &PanicInfo) -> ! {
|
||||
if let Some(args) = info.message() {
|
||||
panic_println!("Kernel panic: {}", args);
|
||||
} else {
|
||||
panic_println!("Kernel panic!");
|
||||
}
|
||||
|
||||
_panic_exit()
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
// Testing
|
||||
//--------------------------------------------------------------------------------------------------
|
||||
|
||||
/// The point of exit when the library is compiled for testing.
|
||||
#[cfg(test)]
|
||||
#[no_mangle]
|
||||
fn _panic_exit() -> ! {
|
||||
arch::qemu_exit_failure()
|
||||
}
|
||||
@ -0,0 +1,102 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2018-2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
//! Printing facilities.
|
||||
|
||||
use crate::{bsp, interface};
|
||||
use core::fmt;
|
||||
|
||||
#[doc(hidden)]
|
||||
pub fn _print(args: fmt::Arguments) {
|
||||
use interface::console::Write;
|
||||
|
||||
bsp::console().write_fmt(args).unwrap();
|
||||
}
|
||||
|
||||
/// Prints without a newline.
|
||||
///
|
||||
/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
|
||||
#[macro_export]
|
||||
macro_rules! print {
|
||||
($($arg:tt)*) => ($crate::print::_print(format_args!($($arg)*)));
|
||||
}
|
||||
|
||||
/// Prints with a newline.
|
||||
///
|
||||
/// Carbon copy from https://doc.rust-lang.org/src/std/macros.rs.html
|
||||
#[macro_export]
|
||||
macro_rules! println {
|
||||
() => ($crate::print!("\n"));
|
||||
($($arg:tt)*) => ({
|
||||
$crate::print::_print(format_args_nl!($($arg)*));
|
||||
})
|
||||
}
|
||||
|
||||
/// Prints an info, with newline.
|
||||
#[macro_export]
|
||||
macro_rules! info {
|
||||
($string:expr) => ({
|
||||
#[allow(unused_imports)]
|
||||
use crate::interface::time::Timer;
|
||||
|
||||
let timestamp = $crate::arch::timer().uptime();
|
||||
let timestamp_subsec_us = timestamp.subsec_micros();
|
||||
|
||||
$crate::print::_print(format_args_nl!(
|
||||
concat!("[ {:>3}.{:03}{:03}] ", $string),
|
||||
timestamp.as_secs(),
|
||||
timestamp_subsec_us / 1_000,
|
||||
timestamp_subsec_us % 1_000
|
||||
));
|
||||
});
|
||||
($format_string:expr, $($arg:tt)*) => ({
|
||||
#[allow(unused_imports)]
|
||||
use crate::interface::time::Timer;
|
||||
|
||||
let timestamp = $crate::arch::timer().uptime();
|
||||
let timestamp_subsec_us = timestamp.subsec_micros();
|
||||
|
||||
$crate::print::_print(format_args_nl!(
|
||||
concat!("[ {:>3}.{:03}{:03}] ", $format_string),
|
||||
timestamp.as_secs(),
|
||||
timestamp_subsec_us / 1_000,
|
||||
timestamp_subsec_us % 1_000,
|
||||
$($arg)*
|
||||
));
|
||||
})
|
||||
}
|
||||
|
||||
/// Prints a warning, with newline.
|
||||
#[macro_export]
|
||||
macro_rules! warn {
|
||||
($string:expr) => ({
|
||||
#[allow(unused_imports)]
|
||||
use crate::interface::time::Timer;
|
||||
|
||||
let timestamp = $crate::arch::timer().uptime();
|
||||
let timestamp_subsec_us = timestamp.subsec_micros();
|
||||
|
||||
$crate::print::_print(format_args_nl!(
|
||||
concat!("[W {:>3}.{:03}{:03}] ", $string),
|
||||
timestamp.as_secs(),
|
||||
timestamp_subsec_us / 1_000,
|
||||
timestamp_subsec_us % 1_000
|
||||
));
|
||||
});
|
||||
($format_string:expr, $($arg:tt)*) => ({
|
||||
#[allow(unused_imports)]
|
||||
use crate::interface::time::Timer;
|
||||
|
||||
let timestamp = $crate::arch::timer().uptime();
|
||||
let timestamp_subsec_us = timestamp.subsec_micros();
|
||||
|
||||
$crate::print::_print(format_args_nl!(
|
||||
concat!("[W {:>3}.{:03}{:03}] ", $format_string),
|
||||
timestamp.as_secs(),
|
||||
timestamp_subsec_us / 1_000,
|
||||
timestamp_subsec_us % 1_000,
|
||||
$($arg)*
|
||||
));
|
||||
})
|
||||
}
|
||||
@ -0,0 +1,29 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2018-2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
//! Rust runtime initialization code.
|
||||
|
||||
/// Equivalent to `crt0` or `c0` code in C/C++ world. Clears the `bss` section, then jumps to kernel
|
||||
/// init code.
|
||||
///
|
||||
/// # Safety
|
||||
///
|
||||
/// - Only a single core must be active and running this function.
|
||||
pub unsafe fn runtime_init() -> ! {
|
||||
extern "C" {
|
||||
// Boundaries of the .bss section, provided by the linker script.
|
||||
static mut __bss_start: u64;
|
||||
static mut __bss_end: u64;
|
||||
|
||||
}
|
||||
|
||||
extern "Rust" {
|
||||
fn kernel_init() -> !;
|
||||
}
|
||||
|
||||
// Zero out the .bss section.
|
||||
r0::zero_bss(&mut __bss_start, &mut __bss_end);
|
||||
|
||||
kernel_init()
|
||||
}
|
||||
@ -0,0 +1,14 @@
|
||||
[package]
|
||||
name = "test-macros"
|
||||
version = "0.1.0"
|
||||
authors = ["Andre Richter <andre.o.richter@gmail.com>"]
|
||||
edition = "2018"
|
||||
|
||||
[lib]
|
||||
proc-macro = true
|
||||
|
||||
[dependencies]
|
||||
proc-macro2 = "1.x"
|
||||
quote = "1.x"
|
||||
syn = { version = "1.x", features = ["full"] }
|
||||
test-types = { path = "../test-types" }
|
||||
@ -0,0 +1,31 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
extern crate proc_macro;
|
||||
|
||||
use proc_macro::TokenStream;
|
||||
use proc_macro2::Span;
|
||||
use quote::quote;
|
||||
use syn::{parse_macro_input, Ident, ItemFn};
|
||||
|
||||
#[proc_macro_attribute]
|
||||
pub fn kernel_test(_attr: TokenStream, input: TokenStream) -> TokenStream {
|
||||
let f = parse_macro_input!(input as ItemFn);
|
||||
|
||||
let test_name = &format!("{}", f.sig.ident.to_string());
|
||||
let test_ident = Ident::new(
|
||||
&format!("{}_TEST_CONTAINER", f.sig.ident.to_string().to_uppercase()),
|
||||
Span::call_site(),
|
||||
);
|
||||
let test_code_block = f.block;
|
||||
|
||||
quote!(
|
||||
#[test_case]
|
||||
const #test_ident: test_types::UnitTest = test_types::UnitTest {
|
||||
name: #test_name,
|
||||
test_func: || #test_code_block,
|
||||
};
|
||||
)
|
||||
.into()
|
||||
}
|
||||
@ -0,0 +1,5 @@
|
||||
[package]
|
||||
name = "test-types"
|
||||
version = "0.1.0"
|
||||
authors = ["Andre Richter <andre.o.richter@gmail.com>"]
|
||||
edition = "2018"
|
||||
@ -0,0 +1,16 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
//! Types for the `custom_test_frameworks` implementation.
|
||||
|
||||
#![no_std]
|
||||
|
||||
/// Unit test container.
|
||||
pub struct UnitTest {
|
||||
/// Name of the test.
|
||||
pub name: &'static str,
|
||||
|
||||
/// Function pointer to the test.
|
||||
pub test_func: fn(),
|
||||
}
|
||||
@ -0,0 +1,50 @@
|
||||
# frozen_string_literal: true
|
||||
|
||||
# SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
#
|
||||
# Copyright (c) 2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
require 'expect'
|
||||
|
||||
TIMEOUT_SECS = 3
|
||||
|
||||
# Verify sending and receiving works as expected.
|
||||
class TxRxHandshake
|
||||
def name
|
||||
'Transmit and Receive handshake'
|
||||
end
|
||||
|
||||
def run(qemu_out, qemu_in)
|
||||
qemu_in.write_nonblock('ABC')
|
||||
raise('TX/RX test failed') if qemu_out.expect('OK1234', TIMEOUT_SECS).nil?
|
||||
end
|
||||
end
|
||||
|
||||
# Check for correct TX statistics implementation. Depends on test 1 being run first.
|
||||
class TxStatistics
|
||||
def name
|
||||
'Transmit statistics'
|
||||
end
|
||||
|
||||
def run(qemu_out, _qemu_in)
|
||||
raise('chars_written reported wrong') if qemu_out.expect('6', TIMEOUT_SECS).nil?
|
||||
end
|
||||
end
|
||||
|
||||
# Check for correct RX statistics implementation. Depends on test 1 being run first.
|
||||
class RxStatistics
|
||||
def name
|
||||
'Receive statistics'
|
||||
end
|
||||
|
||||
def run(qemu_out, _qemu_in)
|
||||
raise('chars_read reported wrong') if qemu_out.expect('3', TIMEOUT_SECS).nil?
|
||||
end
|
||||
end
|
||||
|
||||
##--------------------------------------------------------------------------------------------------
|
||||
## Test registration
|
||||
##--------------------------------------------------------------------------------------------------
|
||||
def subtest_collection
|
||||
[TxRxHandshake.new, TxStatistics.new, RxStatistics.new]
|
||||
end
|
||||
@ -0,0 +1,33 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
//! Console sanity tests - RX, TX and statistics.
|
||||
|
||||
#![feature(format_args_nl)]
|
||||
#![no_main]
|
||||
#![no_std]
|
||||
|
||||
mod panic_exit_failure;
|
||||
|
||||
use libkernel::{bsp, interface::console::*, print};
|
||||
|
||||
#[no_mangle]
|
||||
unsafe fn kernel_init() -> ! {
|
||||
bsp::qemu_bring_up_console();
|
||||
|
||||
// Handshake
|
||||
assert_eq!(bsp::console().read_char(), 'A');
|
||||
assert_eq!(bsp::console().read_char(), 'B');
|
||||
assert_eq!(bsp::console().read_char(), 'C');
|
||||
print!("OK1234");
|
||||
|
||||
// 6
|
||||
print!("{}", bsp::console().chars_written());
|
||||
|
||||
// 3
|
||||
print!("{}", bsp::console().chars_read());
|
||||
|
||||
// The QEMU process running this test will be closed by the I/O test harness.
|
||||
loop {}
|
||||
}
|
||||
@ -0,0 +1,50 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
//! Timer sanity tests.
|
||||
|
||||
#![feature(custom_test_frameworks)]
|
||||
#![no_main]
|
||||
#![no_std]
|
||||
#![reexport_test_harness_main = "test_main"]
|
||||
#![test_runner(libkernel::test_runner)]
|
||||
|
||||
mod panic_exit_failure;
|
||||
|
||||
use core::time::Duration;
|
||||
use libkernel::{arch, arch::timer, bsp, interface::time::Timer};
|
||||
use test_macros::kernel_test;
|
||||
|
||||
#[no_mangle]
|
||||
unsafe fn kernel_init() -> ! {
|
||||
bsp::qemu_bring_up_console();
|
||||
|
||||
// Depending on CPU arch, some timer bring-up code could go here. Not needed for the RPi.
|
||||
|
||||
test_main();
|
||||
|
||||
arch::qemu_exit_success()
|
||||
}
|
||||
|
||||
/// Simple check that the timer is running.
|
||||
#[kernel_test]
|
||||
fn timer_is_counting() {
|
||||
assert!(timer().uptime().as_nanos() > 0)
|
||||
}
|
||||
|
||||
/// Timer resolution must be sufficient.
|
||||
#[kernel_test]
|
||||
fn timer_resolution_is_sufficient() {
|
||||
assert!(timer().resolution().as_nanos() < 100)
|
||||
}
|
||||
|
||||
/// Sanity check spin_for() implementation.
|
||||
#[kernel_test]
|
||||
fn spin_accuracy_check_1_second() {
|
||||
let t1 = timer().uptime();
|
||||
timer().spin_for(Duration::from_secs(1));
|
||||
let t2 = timer().uptime();
|
||||
|
||||
assert_eq!((t2 - t1).as_secs(), 1)
|
||||
}
|
||||
@ -0,0 +1,42 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
//! Page faults must result in synchronous exceptions.
|
||||
|
||||
#![feature(format_args_nl)]
|
||||
#![no_main]
|
||||
#![no_std]
|
||||
|
||||
/// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
|
||||
///
|
||||
/// Reaching this code is a success, because it is called from the synchronous exception handler,
|
||||
/// which is what this test wants to achieve.
|
||||
///
|
||||
/// It also means that this integration test can not use any other code that calls panic!() directly
|
||||
/// or indirectly.
|
||||
mod panic_exit_success;
|
||||
|
||||
use libkernel::{arch, bsp, interface::mm::MMU, println};
|
||||
|
||||
#[no_mangle]
|
||||
unsafe fn kernel_init() -> ! {
|
||||
bsp::qemu_bring_up_console();
|
||||
|
||||
println!("Testing synchronous exception handling by causing a page fault");
|
||||
println!("-------------------------------------------------------------------\n");
|
||||
|
||||
arch::enable_exception_handling();
|
||||
|
||||
if let Err(string) = arch::mmu().init() {
|
||||
println!("MMU: {}", string);
|
||||
arch::qemu_exit_failure()
|
||||
}
|
||||
|
||||
println!("Writing beyond mapped area to address 9 GiB...");
|
||||
let big_addr: u64 = 9 * 1024 * 1024 * 1024;
|
||||
core::ptr::read_volatile(big_addr as *mut u64);
|
||||
|
||||
// If execution reaches here, the memory access above did not cause a page fault exception.
|
||||
arch::qemu_exit_failure()
|
||||
}
|
||||
@ -0,0 +1,9 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
/// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
|
||||
#[no_mangle]
|
||||
fn _panic_exit() -> ! {
|
||||
libkernel::arch::qemu_exit_failure()
|
||||
}
|
||||
@ -0,0 +1,9 @@
|
||||
// SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
//
|
||||
// Copyright (c) 2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
/// Overwrites libkernel's `panic_wait::_panic_exit()` with the QEMU-exit version.
|
||||
#[no_mangle]
|
||||
fn _panic_exit() -> ! {
|
||||
libkernel::arch::qemu_exit_success()
|
||||
}
|
||||
@ -0,0 +1,137 @@
|
||||
#!/usr/bin/env ruby
|
||||
# frozen_string_literal: true
|
||||
|
||||
# SPDX-License-Identifier: MIT OR Apache-2.0
|
||||
#
|
||||
# Copyright (c) 2019 Andre Richter <andre.o.richter@gmail.com>
|
||||
|
||||
require 'pty'
|
||||
|
||||
# Test base class.
|
||||
class Test
|
||||
INDENT = ' '
|
||||
|
||||
def print_border(status)
|
||||
puts
|
||||
puts "#{INDENT}-------------------------------------------------------------------"
|
||||
puts status
|
||||
puts "#{INDENT}-------------------------------------------------------------------\n\n\n"
|
||||
end
|
||||
|
||||
def print_error(error)
|
||||
puts
|
||||
print_border("#{INDENT}❌ Failure: #{error}: #{@test_name}")
|
||||
end
|
||||
|
||||
def print_success
|
||||
print_border("#{INDENT}✔️ Success: #{@test_name}")
|
||||
end
|
||||
|
||||
def print_output
|
||||
puts "#{INDENT}-------------------------------------------------------------------"
|
||||
print INDENT
|
||||
print '🦀 '
|
||||
print @output.join('').gsub("\n", "\n" + INDENT)
|
||||
end
|
||||
|
||||
def finish(error)
|
||||
print_output
|
||||
|
||||
exit_code = if error
|
||||
print_error(error)
|
||||
false
|
||||
else
|
||||
print_success
|
||||
true
|
||||
end
|
||||
|
||||
exit(exit_code)
|
||||
end
|
||||
end
|
||||
|
||||
# Executes tests with console I/O.
|
||||
class ConsoleTest < Test
|
||||
def initialize(binary, qemu_cmd, test_name, console_subtests)
|
||||
@binary = binary
|
||||
@qemu_cmd = qemu_cmd
|
||||
@test_name = test_name
|
||||
@console_subtests = console_subtests
|
||||
@cur_subtest = 1
|
||||
@output = ["Running #{@console_subtests.length} console-based tests\n",
|
||||
"-------------------------------------------------------------------\n\n"]
|
||||
end
|
||||
|
||||
def format_test_name(number, name)
|
||||
formatted_name = number.to_s.rjust(3) + '. ' + name
|
||||
formatted_name.ljust(63, '.')
|
||||
end
|
||||
|
||||
def run_subtest(subtest, qemu_out, qemu_in)
|
||||
@output << format_test_name(@cur_subtest, subtest.name)
|
||||
|
||||
subtest.run(qemu_out, qemu_in)
|
||||
|
||||
@output << "[ok]\n"
|
||||
@cur_subtest += 1
|
||||
end
|
||||
|
||||
def exec
|
||||
error = false
|
||||
|
||||
PTY.spawn(@qemu_cmd) do |qemu_out, qemu_in|
|
||||
begin
|
||||
@console_subtests.each { |t| run_subtest(t, qemu_out, qemu_in) }
|
||||
rescue StandardError => e
|
||||
error = e.message
|
||||
end
|
||||
|
||||
finish(error)
|
||||
end
|
||||
end
|
||||
end
|
||||
|
||||
# A wrapper around the bare QEMU invocation.
|
||||
class RawTest < Test
|
||||
MAX_WAIT_SECS = 5
|
||||
|
||||
def initialize(binary, qemu_cmd, test_name)
|
||||
@binary = binary
|
||||
@qemu_cmd = qemu_cmd
|
||||
@test_name = test_name
|
||||
@output = []
|
||||
end
|
||||
|
||||
def exec
|
||||
error = 'Timed out waiting for test'
|
||||
io = IO.popen(@qemu_cmd)
|
||||
|
||||
while IO.select([io], nil, nil, MAX_WAIT_SECS)
|
||||
begin
|
||||
@output << io.read_nonblock(1024)
|
||||
rescue EOFError
|
||||
error = false
|
||||
break
|
||||
end
|
||||
end
|
||||
|
||||
finish(error)
|
||||
end
|
||||
end
|
||||
|
||||
##--------------------------------------------------------------------------------------------------
|
||||
## Script entry point
|
||||
##--------------------------------------------------------------------------------------------------
|
||||
binary = ARGV.last
|
||||
test_name = binary.gsub(%r{.*deps/}, '').split('-')[0]
|
||||
console_test_file = 'tests/' + test_name + '.rb'
|
||||
qemu_cmd = ARGV.join(' ')
|
||||
|
||||
test_runner = if File.exist?(console_test_file)
|
||||
load console_test_file
|
||||
# subtest_collection is provided by console_test_file
|
||||
ConsoleTest.new(binary, qemu_cmd, test_name, subtest_collection)
|
||||
else
|
||||
RawTest.new(binary, qemu_cmd, test_name)
|
||||
end
|
||||
|
||||
test_runner.exec
|
||||
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|
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Reference in New Issue