Correct stuff clippy complained about

pull/4/head
Andre Richter 6 years ago
parent b42c922012
commit b869cf9a38

@ -25,6 +25,6 @@
use volatile_register::RW;
use super::MMIO_BASE;
pub const GPFSEL1: *const RW<u32> = (MMIO_BASE + 0x00200004) as *const RW<u32>;
pub const GPPUD: *const RW<u32> = (MMIO_BASE + 0x00200094) as *const RW<u32>;
pub const GPPUDCLK0: *const RW<u32> = (MMIO_BASE + 0x00200098) as *const RW<u32>;
pub const GPFSEL1: *const RW<u32> = (MMIO_BASE + 0x0020_0004) as *const RW<u32>;
pub const GPPUD: *const RW<u32> = (MMIO_BASE + 0x0020_0094) as *const RW<u32>;
pub const GPPUDCLK0: *const RW<u32> = (MMIO_BASE + 0x0020_0098) as *const RW<u32>;

@ -28,7 +28,7 @@
extern crate raspi3_glue;
extern crate volatile_register;
const MMIO_BASE: u32 = 0x3F000000;
const MMIO_BASE: u32 = 0x3F00_0000;
mod gpio;
mod uart;

@ -26,7 +26,7 @@ use super::MMIO_BASE;
use volatile_register::*;
use gpio;
const MINI_UART_BASE: u32 = MMIO_BASE + 0x215000;
const MINI_UART_BASE: u32 = MMIO_BASE + 0x21_5000;
/// Auxilary mini UART registers
#[allow(non_snake_case)]

@ -25,6 +25,6 @@
use volatile_register::RW;
use super::MMIO_BASE;
pub const GPFSEL1: *const RW<u32> = (MMIO_BASE + 0x00200004) as *const RW<u32>;
pub const GPPUD: *const RW<u32> = (MMIO_BASE + 0x00200094) as *const RW<u32>;
pub const GPPUDCLK0: *const RW<u32> = (MMIO_BASE + 0x00200098) as *const RW<u32>;
pub const GPFSEL1: *const RW<u32> = (MMIO_BASE + 0x0020_0004) as *const RW<u32>;
pub const GPPUD: *const RW<u32> = (MMIO_BASE + 0x0020_0094) as *const RW<u32>;
pub const GPPUDCLK0: *const RW<u32> = (MMIO_BASE + 0x0020_0098) as *const RW<u32>;

@ -29,7 +29,7 @@ extern crate raspi3_glue;
extern crate rlibc; // for memset et al.b
extern crate volatile_register;
const MMIO_BASE: u32 = 0x3F000000;
const MMIO_BASE: u32 = 0x3F00_0000;
mod mbox;
mod gpio;

@ -59,13 +59,13 @@ pub mod tag {
// Responses
mod response {
pub const SUCCESS: u32 = 0x80000000;
pub const ERROR: u32 = 0x80000001; // error parsing request buffer (partial response)
pub const SUCCESS: u32 = 0x8000_0000;
pub const ERROR: u32 = 0x8000_0001; // error parsing request buffer (partial response)
}
pub const REQUEST: u32 = 0;
const FULL: u32 = 0x80000000;
const EMPTY: u32 = 0x40000000;
const FULL: u32 = 0x8000_0000;
const EMPTY: u32 = 0x4000_0000;
// Public interface to the mailbox
#[repr(C)]
@ -92,7 +92,7 @@ impl Mbox {
// wait until we can write to the mailbox
loop {
unsafe {
if !(((*self.registers).STATUS.read() & FULL) == FULL) {
if ((*self.registers).STATUS.read() & FULL) != FULL {
break;
}
asm!("nop" :::: "volatile");
@ -111,7 +111,7 @@ impl Mbox {
// is there a response?
loop {
unsafe {
if !(((*self.registers).STATUS.read() & EMPTY) == EMPTY) {
if ((*self.registers).STATUS.read() & EMPTY) != EMPTY {
break;
}
asm!("nop" :::: "volatile");

@ -26,7 +26,7 @@ use super::MMIO_BASE;
use volatile_register::*;
use gpio;
const MINI_UART_BASE: u32 = MMIO_BASE + 0x215000;
const MINI_UART_BASE: u32 = MMIO_BASE + 0x21_5000;
/// Auxilary mini UART registers
#[allow(non_snake_case)]

@ -25,6 +25,6 @@
use volatile_register::RW;
use super::MMIO_BASE;
pub const GPFSEL1: *const RW<u32> = (MMIO_BASE + 0x00200004) as *const RW<u32>;
pub const GPPUD: *const RW<u32> = (MMIO_BASE + 0x00200094) as *const RW<u32>;
pub const GPPUDCLK0: *const RW<u32> = (MMIO_BASE + 0x00200098) as *const RW<u32>;
pub const GPFSEL1: *const RW<u32> = (MMIO_BASE + 0x0020_0004) as *const RW<u32>;
pub const GPPUD: *const RW<u32> = (MMIO_BASE + 0x0020_0094) as *const RW<u32>;
pub const GPPUDCLK0: *const RW<u32> = (MMIO_BASE + 0x0020_0098) as *const RW<u32>;

@ -29,7 +29,7 @@ extern crate raspi3_glue;
extern crate rlibc; // for memset et al.b
extern crate volatile_register;
const MMIO_BASE: u32 = 0x3F000000;
const MMIO_BASE: u32 = 0x3F00_0000;
mod mbox;
mod gpio;
@ -42,7 +42,7 @@ fn main() {
let uart = uart::Uart::new();
// set up serial console
if let Err(_) = uart.init(&mut mbox) {
if uart.init(&mut mbox).is_err() {
return; // If UART fails, abort early
}

@ -60,18 +60,18 @@ pub mod tag {
// Clocks
pub mod clock {
pub const UART: u32 = 0x000000002;
pub const UART: u32 = 0x0_0000_0002;
}
// Responses
mod response {
pub const SUCCESS: u32 = 0x80000000;
pub const ERROR: u32 = 0x80000001; // error parsing request buffer (partial response)
pub const SUCCESS: u32 = 0x8000_0000;
pub const ERROR: u32 = 0x8000_0001; // error parsing request buffer (partial response)
}
pub const REQUEST: u32 = 0;
const FULL: u32 = 0x80000000;
const EMPTY: u32 = 0x40000000;
const FULL: u32 = 0x8000_0000;
const EMPTY: u32 = 0x4000_0000;
// Public interface to the mailbox
#[repr(C)]
@ -98,7 +98,7 @@ impl Mbox {
// wait until we can write to the mailbox
loop {
unsafe {
if !(((*self.registers).STATUS.read() & FULL) == FULL) {
if ((*self.registers).STATUS.read() & FULL) != FULL {
break;
}
asm!("nop" :::: "volatile");
@ -117,7 +117,7 @@ impl Mbox {
// is there a response?
loop {
unsafe {
if !(((*self.registers).STATUS.read() & EMPTY) == EMPTY) {
if ((*self.registers).STATUS.read() & EMPTY) != EMPTY {
break;
}
asm!("nop" :::: "volatile");

@ -28,7 +28,7 @@ use mbox;
use gpio;
use core::sync::atomic::{compiler_fence, Ordering};
const UART_BASE: u32 = MMIO_BASE + 0x201000;
const UART_BASE: u32 = MMIO_BASE + 0x20_1000;
// PL011 UART registers
#[allow(non_snake_case)]
@ -74,7 +74,7 @@ impl Uart {
mbox.buffer[3] = 12;
mbox.buffer[4] = 8;
mbox.buffer[5] = mbox::clock::UART; // UART clock
mbox.buffer[6] = 4000000; // 4Mhz
mbox.buffer[6] = 4_000_000; // 4Mhz
mbox.buffer[7] = 0; // skip turbo setting
mbox.buffer[8] = mbox::tag::LAST;
@ -83,7 +83,7 @@ impl Uart {
// is done by a store operation as well).
compiler_fence(Ordering::SeqCst);
if let Err(_) = mbox.call(mbox::channel::PROP) {
if mbox.call(mbox::channel::PROP).is_err() {
return Err(UartError::MailboxError); // Abort if UART clocks couldn't be set
};
@ -124,7 +124,7 @@ impl Uart {
unsafe {
// wait until we can send
loop {
if !(((*self.registers).FR.read() & 0x20) == 0x20) {
if ((*self.registers).FR.read() & 0x20) != 0x20 {
break;
}
asm!("nop" :::: "volatile");
@ -140,7 +140,7 @@ impl Uart {
unsafe {
// wait until something is in the buffer
loop {
if !(((*self.registers).FR.read() & 0x10) == 0x10) {
if ((*self.registers).FR.read() & 0x10) != 0x10 {
break;
}
asm!("nop" :::: "volatile");

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