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@ -185,14 +185,13 @@ diff -uNr 05_safe_globals/Makefile 06_drivers_gpio_uart/Makefile
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diff -uNr 05_safe_globals/src/_arch/aarch64/cpu.rs 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
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--- 05_safe_globals/src/_arch/aarch64/cpu.rs
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+++ 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs
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@@ -37,6 +37,17 @@
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@@ -37,6 +37,16 @@
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// Public Code
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//--------------------------------------------------------------------------------------------------
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+pub use asm::nop;
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+
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+/// Spin for `n` cycles.
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+#[cfg(feature = "bsp_rpi3")]
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+#[inline(always)]
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+pub fn spin_for_cycles(n: usize) {
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+ for _ in 0..n {
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@ -433,7 +432,7 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 06_drivers_g
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diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
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--- 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
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+++ 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
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@@ -0,0 +1,307 @@
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@@ -0,0 +1,381 @@
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+// SPDX-License-Identifier: MIT OR Apache-2.0
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+//
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+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
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@ -572,6 +571,12 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_dri
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+/// Abstraction for the associated MMIO registers.
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+type Registers = MMIODerefWrapper<RegisterBlock>;
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+
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+#[derive(PartialEq)]
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+enum BlockingMode {
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+ Blocking,
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+ NonBlocking,
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+}
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+
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+//--------------------------------------------------------------------------------------------------
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+// Public Definitions
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+//--------------------------------------------------------------------------------------------------
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@ -610,24 +615,41 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_dri
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+
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+ /// Set up baud rate and characteristics.
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+ ///
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+ /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
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+ /// This results in 8N1 and 921_600 baud.
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+ ///
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+ /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
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+ /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
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+ /// The calculation for the BRD is (we set the clock to 48 MHz in config.txt):
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+ /// `(48_000_000 / 16) / 921_600 = 3.2552083`. `3` goes to the `IBRD` (integer field).
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+ ///
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+ /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
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+ /// give the best approximation we can get. A 5 modulo error margin is acceptable for UART and we're
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+ /// now at 0.01 modulo.
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+ /// The `FBRD` (fractional field) is only 6 bits so `0.2552083 * 64 = 16.3 rounded to 16` will
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+ /// give the best approximation we can get. A 5modulo error margin is acceptable for UART and we're
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+ /// now at 0.02modulo.
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+ pub fn init(&mut self) {
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+ // Turn it off temporarily.
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+ // Execution can arrive here while there are still characters queued in the TX FIFO and
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+ // actively being sent out by the UART hardware. If the UART is turned off in this case,
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+ // those queued characters would be lost.
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+ //
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+ // For example, this can happen during runtime on a call to panic!(), because panic!()
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+ // initializes its own UART instance and calls init().
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+ //
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+ // Hence, flush first to ensure all pending characters are transmitted.
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+ self.flush();
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+
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+ // Turn the UART off temporarily.
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+ self.registers.CR.set(0);
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+
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+ // Clear all pending interrupts.
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+ self.registers.ICR.write(ICR::ALL::CLEAR);
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+ self.registers.IBRD.write(IBRD::IBRD.val(5));
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+ self.registers.FBRD.write(FBRD::FBRD.val(13));
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+
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+ // Set the baud rate.
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+ self.registers.IBRD.write(IBRD::IBRD.val(3));
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+ self.registers.FBRD.write(FBRD::FBRD.val(16));
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+
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+ // Set 8N1 + FIFO on.
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+ self.registers
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+ .LCRH
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+ .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
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+ .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled);
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+
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+ // Turn the UART on.
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+ self.registers
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+ .CR
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+ .write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
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@ -645,6 +667,58 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_dri
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+
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+ self.chars_written += 1;
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+ }
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+
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+ /// Block execution until the last buffered character has been physically put on the TX wire.
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+ fn flush(&self) {
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+ // The bit time for 921_600 baud is 1 / 921_600 = 1.09 µs. 8N1 has a total of 10 bits per
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+ // symbol (start bit, 8 data bits, stop bit), so one symbol takes round about 10 * 1.09 =
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+ // 10.9 µs, or 10_900 ns. Round it up to 12_000 ns to be on the safe side.
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+ //
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+ // Now make an educated guess for a good delay value. According to Wikipedia, the fastest
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+ // RPi4 clocks around 1.5 GHz.
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+ //
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+ // So lets try to be on the safe side and default to 24_000 cycles, which would equal 12_000
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+ // ns would the CPU be clocked at 2 GHz.
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+ const CHAR_TIME_SAFE: usize = 24_000;
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+
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+ // Spin until TX FIFO empty is set.
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+ while !self.registers.FR.matches_all(FR::TXFE::SET) {
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+ cpu::nop();
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+ }
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+
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+ // After the last character has been queued for transmission, wait for the time of one
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+ // character + some extra time for safety.
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+ cpu::spin_for_cycles(CHAR_TIME_SAFE);
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+ }
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+
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+ /// Retrieve a character.
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+ fn read_char_converting(&mut self, blocking_mode: BlockingMode) -> Option<char> {
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+ // If RX FIFO is empty,
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+ if self.registers.FR.matches_all(FR::RXFE::SET) {
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+ // immediately return in non-blocking mode.
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+ if blocking_mode == BlockingMode::NonBlocking {
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+ return None;
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+ }
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+
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+ // Otherwise, wait until a char was received.
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+ while self.registers.FR.matches_all(FR::RXFE::SET) {
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+ cpu::nop();
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+ }
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+ }
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+
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+ // Read one character.
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+ let mut ret = self.registers.DR.get() as u8 as char;
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+
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+ // Convert carrige return to newline.
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+ if ret == '\r' {
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+ ret = '\n'
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+ }
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+
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+ // Update statistics.
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+ self.chars_read += 1;
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+
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+ Some(ret)
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+ }
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+}
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+
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+/// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
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@ -667,6 +741,8 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_dri
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+}
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+
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+impl PL011Uart {
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+ /// Create an instance.
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+ ///
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+ /// # Safety
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+ ///
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+ /// - The user must ensure to provide a correct MMIO start address.
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@ -706,29 +782,26 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_dri
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+ // readability.
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+ self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
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+ }
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+
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+ fn flush(&self) {
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+ // Spin until TX FIFO empty is set.
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+ self.inner.lock(|inner| inner.flush());
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+ }
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+}
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+
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+impl console::interface::Read for PL011Uart {
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+ fn read_char(&self) -> char {
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+ self.inner.lock(|inner| {
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+ // Spin while RX FIFO empty is set.
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+ while inner.registers.FR.matches_all(FR::RXFE::SET) {
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+ cpu::nop();
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+ }
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+
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+ // Read one character.
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+ let mut ret = inner.registers.DR.get() as u8 as char;
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+
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+ // Convert carrige return to newline.
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+ if ret == '\r' {
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+ ret = '\n'
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+ }
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+
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+ // Update statistics.
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+ inner.chars_read += 1;
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+ self.inner
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+ .lock(|inner| inner.read_char_converting(BlockingMode::Blocking).unwrap())
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+ }
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+
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+ ret
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+ })
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+ fn clear_rx(&self) {
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+ // Read from the RX FIFO until it is indicating empty.
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+ while self
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+ .inner
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+ .lock(|inner| inner.read_char_converting(BlockingMode::NonBlocking))
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+ .is_some()
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+ {}
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+ }
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+}
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+
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@ -1096,7 +1169,7 @@ diff -uNr 05_safe_globals/src/bsp.rs 06_drivers_gpio_uart/src/bsp.rs
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diff -uNr 05_safe_globals/src/console.rs 06_drivers_gpio_uart/src/console.rs
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--- 05_safe_globals/src/console.rs
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+++ 06_drivers_gpio_uart/src/console.rs
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@@ -14,18 +14,34 @@
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@@ -14,8 +14,26 @@
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/// Console write functions.
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pub trait Write {
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@ -1105,19 +1178,25 @@ diff -uNr 05_safe_globals/src/console.rs 06_drivers_gpio_uart/src/console.rs
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+
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/// Write a Rust format string.
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fn write_fmt(&self, args: fmt::Arguments) -> fmt::Result;
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}
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+
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+ /// Block execution until the last buffered character has been physically put on the TX
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+ /// wire.
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+ fn flush(&self);
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+ }
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+
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+ /// Console read functions.
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+ pub trait Read {
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+ /// Read a single character.
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+ fn read_char(&self) -> char {
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+ ' '
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+ }
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+ }
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+
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+ /// Clear RX buffers, if any.
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+ fn clear_rx(&self);
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}
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/// Console statistics.
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pub trait Statistics {
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/// Return the number of characters written.
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@@ -24,8 +42,13 @@
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fn chars_written(&self) -> usize {
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0
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}
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@ -1216,7 +1295,7 @@ diff -uNr 05_safe_globals/src/main.rs 06_drivers_gpio_uart/src/main.rs
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mod memory;
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mod panic_wait;
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mod print;
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@@ -115,16 +125,46 @@
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@@ -115,16 +125,49 @@
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/// # Safety
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///
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/// - Only a single core must be active and running this function.
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@ -1240,6 +1319,7 @@ diff -uNr 05_safe_globals/src/main.rs 06_drivers_gpio_uart/src/main.rs
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- println!("[0] Hello from pure Rust!");
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+/// The main function running after the early init.
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+fn kernel_main() -> ! {
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+ use bsp::console::console;
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+ use console::interface::All;
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+ use driver::interface::DriverManager;
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+
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@ -1263,6 +1343,8 @@ diff -uNr 05_safe_globals/src/main.rs 06_drivers_gpio_uart/src/main.rs
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- println!("[2] Stopping here.");
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- cpu::wait_forever()
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+ // Discard any spurious received characters before going into echo mode.
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+ console().clear_rx();
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+ loop {
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+ let c = bsp::console::console().read_char();
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+ bsp::console::console().write_char(c);
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Andre Richter
3 years ago
committed by
Andre Richter