Add timer tutorial
- Also, upgrade to new `cortex-a` 0.1.3 implementation.pull/4/head
Andre Richter
6 years ago
parent
b2ddb8600d
commit
e6f823a224
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#
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# Copyright (C) 2018 bzt (bztsrc@github)
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#
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# Permission is hereby granted, free of charge, to any person
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# obtaining a copy of this software and associated documentation
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# files (the "Software"), to deal in the Software without
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# restriction, including without limitation the rights to use, copy,
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# modify, merge, publish, distribute, sublicense, and/or sell copies
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# of the Software, and to permit persons to whom the Software is
|
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# furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice shall be
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# included in all copies or substantial portions of the Software.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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# HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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# DEALINGS IN THE SOFTWARE.
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#
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#
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SRCS = $(wildcard *.c)
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OBJS = $(SRCS:.c=.o)
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CFLAGS = -Wall -O2 -ffreestanding -nostdinc -nostdlib -nostartfiles
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all: clean kernel8.img
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start.o: start.S
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aarch64-elf-gcc $(CFLAGS) -c start.S -o start.o
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%.o: %.c
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aarch64-elf-gcc $(CFLAGS) -c $< -o $@
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kernel8.img: start.o $(OBJS)
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aarch64-elf-ld -nostdlib -nostartfiles start.o $(OBJS) -T link.ld -o kernel8.elf
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aarch64-elf-objcopy -O binary kernel8.elf kernel8.img
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clean:
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rm kernel8.elf *.o >/dev/null 2>/dev/null || true
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Oktatóanyag 07 - Késleltetések
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==============================
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Roppant fontos, hogy a megfelelő időtartamot késleltessünk, amikor alacsony szintű hardverrel bánunk.
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Ebben az okatatóanyagban három megközelítést nézünk meg. Az egyik CPU órajel függő (akkor hasznos, ha
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a várakozási idő órajelciklusban van megadva), a másik kettő mikroszekundum (másodperc milliomod része) alapú.
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Delays.h, delays.c
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------------------
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`wait_cycles(n)` ez nagyon faék, n-szer lefuttatjuk a `nop` (nincs utasítás) utasítást.
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`wait_msec(n)` ez a megvalósítás ARM rendszer regisztereket használ (minden AArch64 CPU-n elérhető).
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`wait_msec_st(n)` ez pedig BCM specifikus, ami a Rendszer Időzítő perifériát használja (nincs emulálva qemu-n).
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Main
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----
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Különböző implementációkkal várakozunk a konzolra írások között.
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Tutorial 07 - Delays
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====================
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It is very important to wait precise amounts of time while you're interfacing with low level hardware.
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In this tutorial we'll cover there ways. One is CPU frequency dependent (and useful if wait time is given
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in CPU clock cycles), the other two are microsec (millionth of a second) based.
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Delays.h, delays.c
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------------------
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`wait_cycles(n)` this is a very straightforward thing, we execute the 'nop' instruction n times.
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`wait_msec(n)` this implementation uses ARM system registers (available on all AArch64 CPUs).
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`wait_msec_st(n)` is a BCM specific implementation, which uses the System Timer peripheral (not available on qemu).
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Main
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----
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We use different wait implementations between printing strings on serial console.
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@ -1,81 +0,0 @@
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/*
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* Copyright (C) 2018 bzt (bztsrc@github)
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "gpio.h"
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#define SYSTMR_LO ((volatile unsigned int*)(MMIO_BASE+0x00003004))
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#define SYSTMR_HI ((volatile unsigned int*)(MMIO_BASE+0x00003008))
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/**
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* Wait N CPU cycles (ARM CPU only)
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*/
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void wait_cycles(unsigned int n)
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{
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if(n) while(n--) { asm volatile("nop"); }
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}
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/**
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* Wait N microsec (ARM CPU only)
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*/
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void wait_msec(unsigned int n)
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{
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register unsigned long f, t, r;
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// get the current counter frequency
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asm volatile ("mrs %0, cntfrq_el0" : "=r"(f));
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// read the current counter
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asm volatile ("mrs %0, cntpct_el0" : "=r"(t));
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// calculate expire value for counter
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t+=((f/1000)*n)/1000;
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do{asm volatile ("mrs %0, cntpct_el0" : "=r"(r));}while(r<t);
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}
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/**
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* Get System Timer's counter
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*/
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unsigned long get_system_timer()
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{
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unsigned int h=-1, l;
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// we must read MMIO area as two separate 32 bit reads
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h=*SYSTMR_HI;
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l=*SYSTMR_LO;
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// we have to repeat it if high word changed during read
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if(h!=*SYSTMR_HI) {
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h=*SYSTMR_HI;
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l=*SYSTMR_LO;
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}
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// compose long int value
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return ((unsigned long) h << 32) | l;
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}
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/**
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* Wait N microsec (with BCM System Timer)
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*/
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void wait_msec_st(unsigned int n)
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{
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unsigned long t=get_system_timer();
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// we must check if it's non-zero, because qemu does not emulate
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// system timer, and returning constant zero would mean infinite loop
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if(t) while(get_system_timer() < t+n);
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}
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@ -1,29 +0,0 @@
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/*
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* Copyright (C) 2018 bzt (bztsrc@github)
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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*/
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void wait_cycles(unsigned int n);
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void wait_msec(unsigned int n);
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unsigned long get_system_timer();
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void wait_msec_st(unsigned int n);
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/*
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* Copyright (C) 2018 bzt (bztsrc@github)
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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*/
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#define MMIO_BASE 0x3F000000
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#define GPFSEL0 ((volatile unsigned int*)(MMIO_BASE+0x00200000))
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#define GPFSEL1 ((volatile unsigned int*)(MMIO_BASE+0x00200004))
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#define GPFSEL2 ((volatile unsigned int*)(MMIO_BASE+0x00200008))
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#define GPFSEL3 ((volatile unsigned int*)(MMIO_BASE+0x0020000C))
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#define GPFSEL4 ((volatile unsigned int*)(MMIO_BASE+0x00200010))
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#define GPFSEL5 ((volatile unsigned int*)(MMIO_BASE+0x00200014))
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#define GPSET0 ((volatile unsigned int*)(MMIO_BASE+0x0020001C))
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#define GPSET1 ((volatile unsigned int*)(MMIO_BASE+0x00200020))
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#define GPCLR0 ((volatile unsigned int*)(MMIO_BASE+0x00200028))
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#define GPLEV0 ((volatile unsigned int*)(MMIO_BASE+0x00200034))
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#define GPLEV1 ((volatile unsigned int*)(MMIO_BASE+0x00200038))
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#define GPEDS0 ((volatile unsigned int*)(MMIO_BASE+0x00200040))
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#define GPEDS1 ((volatile unsigned int*)(MMIO_BASE+0x00200044))
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#define GPHEN0 ((volatile unsigned int*)(MMIO_BASE+0x00200064))
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#define GPHEN1 ((volatile unsigned int*)(MMIO_BASE+0x00200068))
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#define GPPUD ((volatile unsigned int*)(MMIO_BASE+0x00200094))
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#define GPPUDCLK0 ((volatile unsigned int*)(MMIO_BASE+0x00200098))
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#define GPPUDCLK1 ((volatile unsigned int*)(MMIO_BASE+0x0020009C))
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Binary file not shown.
@ -1,54 +0,0 @@
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/*
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* Copyright (C) 2018 bzt (bztsrc@github)
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
|
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "uart.h"
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#include "delays.h"
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void main()
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{
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// set up serial console
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uart_init();
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uart_puts("Waiting 1000000 CPU cycles (ARM CPU): ");
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wait_cycles(1000000);
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uart_puts("OK\n");
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uart_puts("Waiting 1000000 microsec (ARM CPU): ");
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wait_msec(1000000);
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uart_puts("OK\n");
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uart_puts("Waiting 1000000 microsec (BCM System Timer): ");
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if(get_system_timer()==0) {
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uart_puts("Not available\n");
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} else {
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wait_msec_st(1000000);
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uart_puts("OK\n");
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}
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// echo everything back
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while(1) {
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uart_send(uart_getc());
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}
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}
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@ -1,63 +0,0 @@
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/*
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* Copyright (C) 2018 bzt (bztsrc@github)
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
|
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* files (the "Software"), to deal in the Software without
|
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* restriction, including without limitation the rights to use, copy,
|
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* modify, merge, publish, distribute, sublicense, and/or sell copies
|
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* of the Software, and to permit persons to whom the Software is
|
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* furnished to do so, subject to the following conditions:
|
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*
|
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* The above copyright notice and this permission notice shall be
|
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* included in all copies or substantial portions of the Software.
|
||||
*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
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* DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "gpio.h"
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/* mailbox message buffer */
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volatile unsigned int __attribute__((aligned(16))) mbox[36];
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#define VIDEOCORE_MBOX (MMIO_BASE+0x0000B880)
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#define MBOX_READ ((volatile unsigned int*)(VIDEOCORE_MBOX+0x0))
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#define MBOX_POLL ((volatile unsigned int*)(VIDEOCORE_MBOX+0x10))
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#define MBOX_SENDER ((volatile unsigned int*)(VIDEOCORE_MBOX+0x14))
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#define MBOX_STATUS ((volatile unsigned int*)(VIDEOCORE_MBOX+0x18))
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#define MBOX_CONFIG ((volatile unsigned int*)(VIDEOCORE_MBOX+0x1C))
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#define MBOX_WRITE ((volatile unsigned int*)(VIDEOCORE_MBOX+0x20))
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#define MBOX_RESPONSE 0x80000000
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#define MBOX_FULL 0x80000000
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#define MBOX_EMPTY 0x40000000
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/**
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* Make a mailbox call. Returns 0 on failure, non-zero on success
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*/
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int mbox_call(unsigned char ch)
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{
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unsigned int r;
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/* wait until we can write to the mailbox */
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do{asm volatile("nop");}while(*MBOX_STATUS & MBOX_FULL);
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/* write the address of our message to the mailbox with channel identifier */
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*MBOX_WRITE = (((unsigned int)((unsigned long)&mbox)&~0xF) | (ch&0xF));
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/* now wait for the response */
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while(1) {
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/* is there a response? */
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do{asm volatile("nop");}while(*MBOX_STATUS & MBOX_EMPTY);
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r=*MBOX_READ;
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/* is it a response to our message? */
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if((unsigned char)(r&0xF)==ch && (r&~0xF)==(unsigned int)((unsigned long)&mbox))
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/* is it a valid successful response? */
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return mbox[1]==MBOX_RESPONSE;
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}
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return 0;
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}
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@ -1,46 +0,0 @@
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/*
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* Copyright (C) 2018 bzt (bztsrc@github)
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*
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* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
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* DEALINGS IN THE SOFTWARE.
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*
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*/
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/* a properly aligned buffer */
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extern volatile unsigned int mbox[36];
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#define MBOX_REQUEST 0
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/* channels */
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#define MBOX_CH_POWER 0
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#define MBOX_CH_FB 1
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#define MBOX_CH_VUART 2
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#define MBOX_CH_VCHIQ 3
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#define MBOX_CH_LEDS 4
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#define MBOX_CH_BTNS 5
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#define MBOX_CH_TOUCH 6
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#define MBOX_CH_COUNT 7
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#define MBOX_CH_PROP 8
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/* tags */
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#define MBOX_TAG_SETCLKRATE 0x38002
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#define MBOX_TAG_LAST 0
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int mbox_call(unsigned char ch);
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@ -1,55 +0,0 @@
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/*
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* Copyright (C) 2018 bzt (bztsrc@github)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*/
|
||||
|
||||
.section ".text.boot"
|
||||
|
||||
.global _start
|
||||
|
||||
_start:
|
||||
// read cpu id, stop slave cores
|
||||
mrs x1, mpidr_el1
|
||||
and x1, x1, #3
|
||||
cbz x1, 2f
|
||||
// cpu id > 0, stop
|
||||
1: wfe
|
||||
b 1b
|
||||
2: // cpu id == 0
|
||||
|
||||
// set stack before our code
|
||||
ldr x1, =_start
|
||||
mov sp, x1
|
||||
|
||||
// clear bss
|
||||
ldr x1, =__bss_start
|
||||
ldr w2, =__bss_size
|
||||
3: cbz w2, 4f
|
||||
str xzr, [x1], #8
|
||||
sub w2, w2, #1
|
||||
cbnz w2, 3b
|
||||
|
||||
// jump to C code, should not return
|
||||
4: bl main
|
||||
// for failsafe, halt this core too
|
||||
b 1b
|
||||
@ -1,127 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2018 bzt (bztsrc@github)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "gpio.h"
|
||||
#include "mbox.h"
|
||||
#include "delays.h"
|
||||
|
||||
/* PL011 UART registers */
|
||||
#define UART0_DR ((volatile unsigned int*)(MMIO_BASE+0x00201000))
|
||||
#define UART0_FR ((volatile unsigned int*)(MMIO_BASE+0x00201018))
|
||||
#define UART0_IBRD ((volatile unsigned int*)(MMIO_BASE+0x00201024))
|
||||
#define UART0_FBRD ((volatile unsigned int*)(MMIO_BASE+0x00201028))
|
||||
#define UART0_LCRH ((volatile unsigned int*)(MMIO_BASE+0x0020102C))
|
||||
#define UART0_CR ((volatile unsigned int*)(MMIO_BASE+0x00201030))
|
||||
#define UART0_IMSC ((volatile unsigned int*)(MMIO_BASE+0x00201038))
|
||||
#define UART0_ICR ((volatile unsigned int*)(MMIO_BASE+0x00201044))
|
||||
|
||||
/**
|
||||
* Set baud rate and characteristics (115200 8N1) and map to GPIO
|
||||
*/
|
||||
void uart_init()
|
||||
{
|
||||
register unsigned int r;
|
||||
|
||||
/* initialize UART */
|
||||
*UART0_CR = 0; // turn off UART0
|
||||
|
||||
/* set up clock for consistent divisor values */
|
||||
mbox[0] = 8*4;
|
||||
mbox[1] = MBOX_REQUEST;
|
||||
mbox[2] = MBOX_TAG_SETCLKRATE; // set clock rate
|
||||
mbox[3] = 12;
|
||||
mbox[4] = 8;
|
||||
mbox[5] = 2; // UART clock
|
||||
mbox[6] = 4000000; // 4Mhz
|
||||
mbox[7] = MBOX_TAG_LAST;
|
||||
mbox_call(MBOX_CH_PROP);
|
||||
|
||||
/* map UART0 to GPIO pins */
|
||||
r=*GPFSEL1;
|
||||
r&=~((7<<12)|(7<<15)); // gpio14, gpio15
|
||||
r|=(4<<12)|(4<<15); // alt0
|
||||
*GPFSEL1 = r;
|
||||
*GPPUD = 0; // enable pins 14 and 15
|
||||
wait_cycles(150);
|
||||
*GPPUDCLK0 = (1<<14)|(1<<15);
|
||||
wait_cycles(150);
|
||||
*GPPUDCLK0 = 0; // flush GPIO setup
|
||||
|
||||
*UART0_ICR = 0x7FF; // clear interrupts
|
||||
*UART0_IBRD = 2; // 115200 baud
|
||||
*UART0_FBRD = 0xB;
|
||||
*UART0_LCRH = 0b11<<5; // 8n1
|
||||
*UART0_CR = 0x301; // enable Tx, Rx, FIFO
|
||||
}
|
||||
|
||||
/**
|
||||
* Send a character
|
||||
*/
|
||||
void uart_send(unsigned int c) {
|
||||
/* wait until we can send */
|
||||
do{asm volatile("nop");}while(*UART0_FR&0x20);
|
||||
/* write the character to the buffer */
|
||||
*UART0_DR=c;
|
||||
}
|
||||
|
||||
/**
|
||||
* Receive a character
|
||||
*/
|
||||
char uart_getc() {
|
||||
char r;
|
||||
/* wait until something is in the buffer */
|
||||
do{asm volatile("nop");}while(*UART0_FR&0x10);
|
||||
/* read it and return */
|
||||
r=(char)(*UART0_DR);
|
||||
/* convert carrige return to newline */
|
||||
return r=='\r'?'\n':r;
|
||||
}
|
||||
|
||||
/**
|
||||
* Display a string
|
||||
*/
|
||||
void uart_puts(char *s) {
|
||||
while(*s) {
|
||||
/* convert newline to carrige return + newline */
|
||||
if(*s=='\n')
|
||||
uart_send('\r');
|
||||
uart_send(*s++);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Display a binary value in hexadecimal
|
||||
*/
|
||||
void uart_hex(unsigned int d) {
|
||||
unsigned int n;
|
||||
int c;
|
||||
for(c=28;c>=0;c-=4) {
|
||||
// get highest tetrad
|
||||
n=(d>>c)&0xF;
|
||||
// 0-9 => '0'-'9', 10-15 => 'A'-'F'
|
||||
n+=n>9?0x37:0x30;
|
||||
uart_send(n);
|
||||
}
|
||||
}
|
||||
@ -1,30 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2018 bzt (bztsrc@github)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use, copy,
|
||||
* modify, merge, publish, distribute, sublicense, and/or sell copies
|
||||
* of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*/
|
||||
|
||||
void uart_init();
|
||||
void uart_send(unsigned int c);
|
||||
char uart_getc();
|
||||
void uart_puts(char *s);
|
||||
void uart_hex(unsigned int d);
|
||||
@ -0,0 +1,61 @@
|
||||
[[package]]
|
||||
name = "bitflags"
|
||||
version = "1.0.1"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
|
||||
[[package]]
|
||||
name = "cortex-a"
|
||||
version = "0.1.3"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
dependencies = [
|
||||
"bitflags 1.0.1 (registry+https://github.com/rust-lang/crates.io-index)",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "kernel8"
|
||||
version = "0.1.0"
|
||||
dependencies = [
|
||||
"cortex-a 0.1.3 (registry+https://github.com/rust-lang/crates.io-index)",
|
||||
"raspi3_glue 0.1.0",
|
||||
"volatile-register 0.2.0 (registry+https://github.com/rust-lang/crates.io-index)",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "panic-abort"
|
||||
version = "0.1.1"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
|
||||
[[package]]
|
||||
name = "r0"
|
||||
version = "0.2.2"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
|
||||
[[package]]
|
||||
name = "raspi3_glue"
|
||||
version = "0.1.0"
|
||||
dependencies = [
|
||||
"cortex-a 0.1.3 (registry+https://github.com/rust-lang/crates.io-index)",
|
||||
"panic-abort 0.1.1 (registry+https://github.com/rust-lang/crates.io-index)",
|
||||
"r0 0.2.2 (registry+https://github.com/rust-lang/crates.io-index)",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "vcell"
|
||||
version = "0.1.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
|
||||
[[package]]
|
||||
name = "volatile-register"
|
||||
version = "0.2.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
dependencies = [
|
||||
"vcell 0.1.0 (registry+https://github.com/rust-lang/crates.io-index)",
|
||||
]
|
||||
|
||||
[metadata]
|
||||
"checksum bitflags 1.0.1 (registry+https://github.com/rust-lang/crates.io-index)" = "b3c30d3802dfb7281680d6285f2ccdaa8c2d8fee41f93805dba5c4cf50dc23cf"
|
||||
"checksum cortex-a 0.1.3 (registry+https://github.com/rust-lang/crates.io-index)" = "a123fa5a346531ed0fc9fcb8f69ca34d9b8c55b15162731945d14c4d461c5bfe"
|
||||
"checksum panic-abort 0.1.1 (registry+https://github.com/rust-lang/crates.io-index)" = "75553c30311427a2d9f24a646fc8cedb00e1da1c6bd1608d71d634184c60392e"
|
||||
"checksum r0 0.2.2 (registry+https://github.com/rust-lang/crates.io-index)" = "e2a38df5b15c8d5c7e8654189744d8e396bddc18ad48041a500ce52d6948941f"
|
||||
"checksum vcell 0.1.0 (registry+https://github.com/rust-lang/crates.io-index)" = "45c297f0afb6928cd08ab1ff9d95e99392595ea25ae1b5ecf822ff8764e57a0d"
|
||||
"checksum volatile-register 0.2.0 (registry+https://github.com/rust-lang/crates.io-index)" = "0d67cb4616d99b940db1d6bd28844ff97108b498a6ca850e5b6191a532063286"
|
||||
@ -0,0 +1,9 @@
|
||||
[package]
|
||||
name = "kernel8"
|
||||
version = "0.1.0"
|
||||
authors = ["Andre Richter <andre.o.richter@gmail.com>"]
|
||||
|
||||
[dependencies]
|
||||
raspi3_glue = { path = "raspi3_glue" }
|
||||
cortex-a = "0.1.3"
|
||||
volatile-register = "0.2.0"
|
||||
@ -0,0 +1,72 @@
|
||||
#
|
||||
# MIT License
|
||||
#
|
||||
# Copyright (c) 2018 Andre Richter <andre.o.richter@gmail.com>
|
||||
#
|
||||
# Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
# of this software and associated documentation files (the "Software"), to deal
|
||||
# in the Software without restriction, including without limitation the rights
|
||||
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
# copies of the Software, and to permit persons to whom the Software is
|
||||
# furnished to do so, subject to the following conditions:
|
||||
#
|
||||
# The above copyright notice and this permission notice shall be included in all
|
||||
# copies or substantial portions of the Software.
|
||||
#
|
||||
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
# SOFTWARE.
|
||||
#
|
||||
|
||||
TARGET = aarch64-raspi3-none-elf
|
||||
|
||||
CROSS_CONTAINER = ./dockcross-linux-aarch64
|
||||
CROSS_CONTAINER_OBJCOPY = aarch64-linux-gnu-objcopy
|
||||
|
||||
UTILS_CONTAINER = andrerichter/raspi3-utils
|
||||
DOCKER_CMD = docker run -it --rm -v $(shell pwd):/work -w /work
|
||||
DOCKER_TTY = --privileged -v /dev:/dev
|
||||
QEMU_CMD = qemu-system-aarch64 -M raspi3 -kernel kernel8.img
|
||||
RASPBOOT_CMD = raspbootcom /dev/ttyUSB0 kernel8.img
|
||||
|
||||
all: clean cross_cont_download kernel8.img
|
||||
|
||||
cross_cont_download:
|
||||
ifeq (,$(wildcard $(CROSS_CONTAINER)))
|
||||
docker run --rm dockcross/linux-arm64 > $(CROSS_CONTAINER)
|
||||
chmod +x $(CROSS_CONTAINER)
|
||||
endif
|
||||
|
||||
target/$(TARGET)/debug/kernel8: src/main.rs
|
||||
RUST_TARGET_PATH=$(shell pwd) xargo build --target=$(TARGET)
|
||||
cp $@ .
|
||||
|
||||
target/$(TARGET)/release/kernel8: src/main.rs
|
||||
RUST_TARGET_PATH=$(shell pwd) xargo build --target=$(TARGET) --release
|
||||
cp $@ .
|
||||
|
||||
ifeq ($(DEBUG),1)
|
||||
kernel8: target/$(TARGET)/debug/kernel8
|
||||
else
|
||||
kernel8: target/$(TARGET)/release/kernel8
|
||||
endif
|
||||
|
||||
kernel8.img: kernel8
|
||||
$(CROSS_CONTAINER) $(CROSS_CONTAINER_OBJCOPY) -O binary -S $< kernel8.img
|
||||
|
||||
qemu:
|
||||
$(DOCKER_CMD) $(UTILS_CONTAINER) $(QEMU_CMD) -serial stdio
|
||||
|
||||
raspboot:
|
||||
$(DOCKER_CMD) $(DOCKER_TTY) $(UTILS_CONTAINER) $(RASPBOOT_CMD)
|
||||
|
||||
clippy:
|
||||
RUSTFLAGS="-C panic=abort" xargo clippy
|
||||
|
||||
clean:
|
||||
cargo clean
|
||||
rm -f kernel8
|
||||
@ -0,0 +1,21 @@
|
||||
# Tutorial 09 - Delays
|
||||
|
||||
It is very important to wait precise amounts of time while you are interfacing
|
||||
with low level hardware. In this tutorial, we'll cover thee ways. One is CPU
|
||||
frequency dependent (and useful if wait time is given in CPU clock cycles), the
|
||||
other two are µs based.
|
||||
|
||||
## delays.rs
|
||||
|
||||
`delays::wait_cycles(cyc: u32)` this is very straightforward, we execute the
|
||||
`nop` instruction n times.
|
||||
|
||||
`delays::wait_msec(n: u32)` this implementation uses ARM system registers
|
||||
(available on all AArch64 CPUs).
|
||||
|
||||
`delays::SysTmr::wait_msec_st(&self, n: u64)` is a BCM specific implementation,
|
||||
which uses the System Timer peripheral (not available on qemu).
|
||||
|
||||
## main.rs
|
||||
|
||||
We test our different wait implementations.
|
||||
@ -0,0 +1,32 @@
|
||||
{
|
||||
"arch": "aarch64",
|
||||
"data-layout": "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128",
|
||||
"executables": true,
|
||||
"linker-flavor": "ld.lld",
|
||||
"linker-is-gnu": true,
|
||||
"pre-link-args": {
|
||||
"ld.lld": [
|
||||
"--script=link.ld"
|
||||
]
|
||||
},
|
||||
"llvm-target": "aarch64-unknown-none",
|
||||
"no-compiler-rt": true,
|
||||
"features": "+a53,+strict-align",
|
||||
"max-atomic-width": 128,
|
||||
"os": "none",
|
||||
"panic": "abort",
|
||||
"panic-strategy": "abort",
|
||||
"relocation-model": "pic",
|
||||
"target-c-int-width": "32",
|
||||
"target-endian": "little",
|
||||
"target-pointer-width": "64",
|
||||
"disable-redzone": true,
|
||||
"abi-blacklist": [
|
||||
"stdcall",
|
||||
"fastcall",
|
||||
"vectorcall",
|
||||
"thiscall",
|
||||
"win64",
|
||||
"sysv64"
|
||||
]
|
||||
}
|
||||
Binary file not shown.
@ -0,0 +1,9 @@
|
||||
[package]
|
||||
name = "raspi3_glue"
|
||||
version = "0.1.0"
|
||||
authors = ["Andre Richter <andre.o.richter@gmail.com>"]
|
||||
|
||||
[dependencies]
|
||||
cortex-a = "0.1.3"
|
||||
panic-abort = "0.1.1"
|
||||
r0 = "0.2.2"
|
||||
@ -0,0 +1,90 @@
|
||||
/*
|
||||
* MIT License
|
||||
*
|
||||
* Copyright (c) 2018 Jorge Aparicio
|
||||
* Copyright (c) 2018 Andre Richter <andre.o.richter@gmail.com>
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*/
|
||||
|
||||
#![feature(lang_items)]
|
||||
#![no_std]
|
||||
|
||||
extern crate cortex_a;
|
||||
extern crate panic_abort;
|
||||
extern crate r0;
|
||||
|
||||
use core::ptr;
|
||||
use cortex_a::{asm, register};
|
||||
|
||||
#[lang = "start"]
|
||||
extern "C" fn start<T>(user_main: fn() -> T, _argc: isize, _argv: *const *const u8) -> isize
|
||||
where
|
||||
T: Termination,
|
||||
{
|
||||
user_main().report() as isize
|
||||
}
|
||||
|
||||
#[lang = "termination"]
|
||||
trait Termination {
|
||||
fn report(self) -> i32;
|
||||
}
|
||||
|
||||
impl Termination for () {
|
||||
fn report(self) -> i32 {
|
||||
0
|
||||
}
|
||||
}
|
||||
|
||||
unsafe fn reset() -> ! {
|
||||
extern "C" {
|
||||
fn main(argc: isize, argv: *const *const u8) -> isize;
|
||||
|
||||
// Boundaries of the .bss section
|
||||
static mut __bss_start: u32;
|
||||
static mut __bss_end: u32;
|
||||
}
|
||||
|
||||
// Zeroes the .bss section
|
||||
r0::zero_bss(&mut __bss_start, &mut __bss_end);
|
||||
|
||||
main(0, ptr::null());
|
||||
|
||||
loop {}
|
||||
}
|
||||
|
||||
/// Entrypoint of the RPi3.
|
||||
///
|
||||
/// Parks all cores except core0, and then jumps to the internal
|
||||
/// `reset()` function, which will call the user's `main()` after
|
||||
/// initializing the `bss` section.
|
||||
#[link_section = ".text.boot"]
|
||||
#[no_mangle]
|
||||
pub extern "C" fn _boot_cores() -> ! {
|
||||
match register::MPIDR_EL1::read_raw() & 0x3 {
|
||||
0 => unsafe {
|
||||
register::SP::write_raw(0x80_000);
|
||||
reset()
|
||||
},
|
||||
_ => loop {
|
||||
// if not core0, infinitely wait for events
|
||||
asm::wfe();
|
||||
},
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,149 @@
|
||||
/*
|
||||
* MIT License
|
||||
*
|
||||
* Copyright (c) 2018 Andre Richter <andre.o.richter@gmail.com>
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*/
|
||||
|
||||
use super::MMIO_BASE;
|
||||
use core::ops;
|
||||
use cortex_a::{asm,
|
||||
register::{CNTFRQ_EL0, CNTP_CTL_EL0, CNTP_TVAL_EL0}};
|
||||
use volatile_register::*;
|
||||
|
||||
/*
|
||||
*
|
||||
* Using the RPi3 SoC's system timer peripheral
|
||||
*
|
||||
*/
|
||||
#[allow(non_snake_case)]
|
||||
#[repr(C)]
|
||||
pub struct RegisterBlock {
|
||||
SYSTMR_LO: RO<u32>, // 0x00
|
||||
SYSTMR_HI: RO<u32>, // 0x04
|
||||
}
|
||||
|
||||
/// Public interface to the BCM System Timer
|
||||
pub struct SysTmr;
|
||||
|
||||
impl ops::Deref for SysTmr {
|
||||
type Target = RegisterBlock;
|
||||
|
||||
fn deref(&self) -> &Self::Target {
|
||||
unsafe { &*Self::ptr() }
|
||||
}
|
||||
}
|
||||
|
||||
impl SysTmr {
|
||||
pub fn new() -> SysTmr {
|
||||
SysTmr
|
||||
}
|
||||
|
||||
/// Returns a pointer to the register block
|
||||
fn ptr() -> *const RegisterBlock {
|
||||
(MMIO_BASE + 0x0000_3004) as *const _
|
||||
}
|
||||
|
||||
/// Get System Timer's counter
|
||||
pub fn get_system_timer(&self) -> u64 {
|
||||
// Since it is MMIO, we must emit two separate 32 bit reads
|
||||
let mut hi = self.SYSTMR_HI.read();
|
||||
|
||||
// We have to repeat if high word changed during read. It
|
||||
// looks a bit odd, but clippy insists that this is idiomatic
|
||||
// Rust!
|
||||
let lo = if hi != self.SYSTMR_HI.read() {
|
||||
hi = self.SYSTMR_HI.read();
|
||||
self.SYSTMR_LO.read()
|
||||
} else {
|
||||
self.SYSTMR_LO.read()
|
||||
};
|
||||
|
||||
// Compose long int value
|
||||
(u64::from(hi) << 32) | u64::from(lo)
|
||||
}
|
||||
|
||||
/// Wait N microsec (with BCM System Timer)
|
||||
pub fn wait_msec_st(&self, n: u64) {
|
||||
let t = self.get_system_timer();
|
||||
|
||||
// We must check if it's non-zero, because qemu does not
|
||||
// emulate system timer, and returning constant zero would
|
||||
// mean infinite loop
|
||||
if t > 0 {
|
||||
loop {
|
||||
if self.get_system_timer() < (t + n) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
*
|
||||
* Using the CPU's counter registers
|
||||
*
|
||||
*/
|
||||
/// Wait N microsec (ARM CPU only)
|
||||
pub fn wait_msec(n: u32) {
|
||||
// Get the counter frequency
|
||||
let frq = CNTFRQ_EL0::read_raw();
|
||||
|
||||
// Calculate number of ticks
|
||||
let tval = (frq as u32 / 1000) * n;
|
||||
|
||||
unsafe {
|
||||
// Set the compare value register
|
||||
CNTP_TVAL_EL0::write_raw(tval);
|
||||
|
||||
// Kick off the counting
|
||||
CNTP_CTL_EL0::modify_flags(|r| {
|
||||
r.set(CNTP_CTL_EL0::ENABLE, true);
|
||||
r.set(CNTP_CTL_EL0::IMASK, true); // Disable timer interrupt
|
||||
});
|
||||
}
|
||||
|
||||
loop {
|
||||
// ISTATUS will be one when cval ticks have passed. Continuously check it.
|
||||
if CNTP_CTL_EL0::read_flags().contains(CNTP_CTL_EL0::ISTATUS) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
// Disable counting again
|
||||
unsafe {
|
||||
CNTP_CTL_EL0::modify_flags(|r| {
|
||||
r.set(CNTP_CTL_EL0::ENABLE, false);
|
||||
});
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
*
|
||||
* Using the CPU's cycles
|
||||
*
|
||||
*/
|
||||
/// Wait N CPU cycles (ARM CPU only)
|
||||
pub fn wait_cycles(cyc: u32) {
|
||||
for _ in 0..cyc {
|
||||
asm::nop();
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,30 @@
|
||||
/*
|
||||
* MIT License
|
||||
*
|
||||
* Copyright (c) 2018 Andre Richter <andre.o.richter@gmail.com>
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*/
|
||||
|
||||
use super::MMIO_BASE;
|
||||
use volatile_register::RW;
|
||||
|
||||
pub const GPFSEL1: *const RW<u32> = (MMIO_BASE + 0x0020_0004) as *const RW<u32>;
|
||||
pub const GPPUD: *const RW<u32> = (MMIO_BASE + 0x0020_0094) as *const RW<u32>;
|
||||
pub const GPPUDCLK0: *const RW<u32> = (MMIO_BASE + 0x0020_0098) as *const RW<u32>;
|
||||
@ -0,0 +1,70 @@
|
||||
/*
|
||||
* MIT License
|
||||
*
|
||||
* Copyright (c) 2018 Andre Richter <andre.o.richter@gmail.com>
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*/
|
||||
|
||||
#![no_std]
|
||||
|
||||
extern crate cortex_a;
|
||||
extern crate raspi3_glue;
|
||||
extern crate volatile_register;
|
||||
|
||||
const MMIO_BASE: u32 = 0x3F00_0000;
|
||||
|
||||
mod delays;
|
||||
mod gpio;
|
||||
mod mbox;
|
||||
mod uart;
|
||||
|
||||
fn main() {
|
||||
let mut mbox = mbox::Mbox::new();
|
||||
let uart = uart::Uart::new();
|
||||
|
||||
// set up serial console
|
||||
if uart.init(&mut mbox).is_err() {
|
||||
return; // If UART fails, abort early
|
||||
}
|
||||
|
||||
uart.getc(); // Press a key first before being greeted
|
||||
uart.puts("Hello Rustacean!\n");
|
||||
|
||||
uart.puts("Waiting 1_000_000 CPU cycles (ARM CPU): ");
|
||||
delays::wait_cycles(1_000_000);
|
||||
uart.puts("OK\n");
|
||||
|
||||
uart.puts("Waiting 1000 microsec (ARM CPU): ");
|
||||
delays::wait_msec(1000);
|
||||
uart.puts("OK\n");
|
||||
|
||||
let t = delays::SysTmr::new();
|
||||
if t.get_system_timer() != 0 {
|
||||
uart.puts("Waiting 1000 microsec (BCM System Timer): ");
|
||||
t.wait_msec_st(1000);
|
||||
uart.puts("OK\n");
|
||||
}
|
||||
|
||||
uart.puts("Looping forever now!\n");
|
||||
loop {
|
||||
delays::wait_msec(1000);
|
||||
uart.puts("Tick: 1s\n");
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,157 @@
|
||||
/*
|
||||
* MIT License
|
||||
*
|
||||
* Copyright (c) 2018 Andre Richter <andre.o.richter@gmail.com>
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*/
|
||||
|
||||
use super::MMIO_BASE;
|
||||
use core::ops;
|
||||
use cortex_a::asm;
|
||||
use volatile_register::{RO, WO};
|
||||
|
||||
const VIDEOCORE_MBOX: u32 = MMIO_BASE + 0xB880;
|
||||
|
||||
#[allow(non_snake_case)]
|
||||
#[repr(C)]
|
||||
pub struct RegisterBlock {
|
||||
READ: RO<u32>, // 0x00
|
||||
__reserved_0: [u32; 3], // 0x04
|
||||
POLL: RO<u32>, // 0x10
|
||||
SENDER: RO<u32>, // 0x14
|
||||
STATUS: RO<u32>, // 0x18
|
||||
CONFIG: RO<u32>, // 0x1C
|
||||
WRITE: WO<u32>, // 0x20
|
||||
}
|
||||
|
||||
// Custom errors
|
||||
pub enum MboxError {
|
||||
ResponseError,
|
||||
UnknownError,
|
||||
}
|
||||
pub type Result<T> = ::core::result::Result<T, MboxError>;
|
||||
|
||||
// Channels
|
||||
pub mod channel {
|
||||
pub const PROP: u32 = 8;
|
||||
}
|
||||
|
||||
// Tags
|
||||
pub mod tag {
|
||||
pub const SETCLKRATE: u32 = 0x38002;
|
||||
pub const LAST: u32 = 0;
|
||||
}
|
||||
|
||||
// Clocks
|
||||
pub mod clock {
|
||||
pub const UART: u32 = 0x0_0000_0002;
|
||||
}
|
||||
|
||||
// Responses
|
||||
mod response {
|
||||
pub const SUCCESS: u32 = 0x8000_0000;
|
||||
pub const ERROR: u32 = 0x8000_0001; // error parsing request buffer (partial response)
|
||||
}
|
||||
|
||||
pub const REQUEST: u32 = 0;
|
||||
const FULL: u32 = 0x8000_0000;
|
||||
const EMPTY: u32 = 0x4000_0000;
|
||||
|
||||
// Public interface to the mailbox
|
||||
#[repr(C)]
|
||||
pub struct Mbox {
|
||||
// The address for buffer needs to be 16-byte aligned so that the
|
||||
// Videcore can handle it properly. We don't take precautions here
|
||||
// to achieve that, but for now it just works. Since alignment of
|
||||
// data structures in Rust is a bit of a hassle right now, we just
|
||||
// close our eyes and roll with it.
|
||||
pub buffer: [u32; 36],
|
||||
}
|
||||
|
||||
/// Deref to RegisterBlock
|
||||
///
|
||||
/// Allows writing
|
||||
/// ```
|
||||
/// self.STATUS.read()
|
||||
/// ```
|
||||
/// instead of something along the lines of
|
||||
/// ```
|
||||
/// unsafe { (*Mbox::ptr()).STATUS.read() }
|
||||
/// ```
|
||||
impl ops::Deref for Mbox {
|
||||
type Target = RegisterBlock;
|
||||
|
||||
fn deref(&self) -> &Self::Target {
|
||||
unsafe { &*Self::ptr() }
|
||||
}
|
||||
}
|
||||
|
||||
impl Mbox {
|
||||
pub fn new() -> Mbox {
|
||||
Mbox { buffer: [0; 36] }
|
||||
}
|
||||
|
||||
/// Returns a pointer to the register block
|
||||
fn ptr() -> *const RegisterBlock {
|
||||
VIDEOCORE_MBOX as *const _
|
||||
}
|
||||
|
||||
/// Make a mailbox call. Returns Err(MboxError) on failure, Ok(()) success
|
||||
pub fn call(&self, channel: u32) -> Result<()> {
|
||||
// wait until we can write to the mailbox
|
||||
loop {
|
||||
if (self.STATUS.read() & FULL) != FULL {
|
||||
break;
|
||||
}
|
||||
|
||||
asm::nop();
|
||||
}
|
||||
|
||||
// write the address of our message to the mailbox with channel identifier
|
||||
unsafe {
|
||||
self.WRITE
|
||||
.write(((self.buffer.as_ptr() as u32) & !0xF) | (channel & 0xF))
|
||||
};
|
||||
|
||||
// now wait for the response
|
||||
loop {
|
||||
// is there a response?
|
||||
loop {
|
||||
if (self.STATUS.read() & EMPTY) != EMPTY {
|
||||
break;
|
||||
}
|
||||
|
||||
asm::nop();
|
||||
}
|
||||
|
||||
let resp: u32 = self.READ.read();
|
||||
|
||||
// is it a response to our message?
|
||||
if ((resp & 0xF) == channel) && ((resp & !0xF) == (self.buffer.as_ptr() as u32)) {
|
||||
// is it a valid successful response?
|
||||
return match self.buffer[1] {
|
||||
response::SUCCESS => Ok(()),
|
||||
response::ERROR => Err(MboxError::ResponseError),
|
||||
_ => Err(MboxError::UnknownError),
|
||||
};
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,181 @@
|
||||
/*
|
||||
* MIT License
|
||||
*
|
||||
* Copyright (c) 2018 Andre Richter <andre.o.richter@gmail.com>
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*/
|
||||
|
||||
use super::MMIO_BASE;
|
||||
use core::ops;
|
||||
use core::sync::atomic::{compiler_fence, Ordering};
|
||||
use cortex_a::asm;
|
||||
use gpio;
|
||||
use mbox;
|
||||
use volatile_register::*;
|
||||
|
||||
const UART_BASE: u32 = MMIO_BASE + 0x20_1000;
|
||||
|
||||
// PL011 UART registers
|
||||
#[allow(non_snake_case)]
|
||||
#[repr(C)]
|
||||
pub struct RegisterBlock {
|
||||
DR: RW<u32>, // 0x00
|
||||
__reserved_0: [u32; 5], // 0x04
|
||||
FR: RO<u32>, // 0x18
|
||||
__reserved_1: [u32; 2], // 0x1c
|
||||
IBRD: WO<u32>, // 0x24
|
||||
FBRD: WO<u32>, // 0x28
|
||||
LCRH: WO<u32>, // 0x2C
|
||||
CR: WO<u32>, // 0x30
|
||||
__reserved_2: [u32; 4], // 0x34
|
||||
ICR: WO<u32>, // 0x44
|
||||
}
|
||||
|
||||
pub enum UartError {
|
||||
MailboxError,
|
||||
}
|
||||
pub type Result<T> = ::core::result::Result<T, UartError>;
|
||||
|
||||
pub struct Uart;
|
||||
|
||||
impl ops::Deref for Uart {
|
||||
type Target = RegisterBlock;
|
||||
|
||||
fn deref(&self) -> &Self::Target {
|
||||
unsafe { &*Self::ptr() }
|
||||
}
|
||||
}
|
||||
|
||||
impl Uart {
|
||||
pub fn new() -> Uart {
|
||||
Uart
|
||||
}
|
||||
|
||||
/// Returns a pointer to the register block
|
||||
fn ptr() -> *const RegisterBlock {
|
||||
UART_BASE as *const _
|
||||
}
|
||||
|
||||
///Set baud rate and characteristics (115200 8N1) and map to GPIO
|
||||
pub fn init(&self, mbox: &mut mbox::Mbox) -> Result<()> {
|
||||
// turn off UART0
|
||||
unsafe { self.CR.write(0) };
|
||||
|
||||
// set up clock for consistent divisor values
|
||||
mbox.buffer[0] = 9 * 4;
|
||||
mbox.buffer[1] = mbox::REQUEST;
|
||||
mbox.buffer[2] = mbox::tag::SETCLKRATE;
|
||||
mbox.buffer[3] = 12;
|
||||
mbox.buffer[4] = 8;
|
||||
mbox.buffer[5] = mbox::clock::UART; // UART clock
|
||||
mbox.buffer[6] = 4_000_000; // 4Mhz
|
||||
mbox.buffer[7] = 0; // skip turbo setting
|
||||
mbox.buffer[8] = mbox::tag::LAST;
|
||||
|
||||
// Insert a compiler fence that ensures that all stores to the
|
||||
// mbox buffer are finished before the GPU is signaled (which
|
||||
// is done by a store operation as well).
|
||||
compiler_fence(Ordering::Release);
|
||||
|
||||
if mbox.call(mbox::channel::PROP).is_err() {
|
||||
return Err(UartError::MailboxError); // Abort if UART clocks couldn't be set
|
||||
};
|
||||
|
||||
// map UART0 to GPIO pins
|
||||
unsafe {
|
||||
(*gpio::GPFSEL1).modify(|x| {
|
||||
// Modify with a closure
|
||||
let mut ret = x;
|
||||
ret &= !((7 << 12) | (7 << 15)); // gpio14, gpio15
|
||||
ret |= (4 << 12) | (4 << 15); // alt0
|
||||
|
||||
ret
|
||||
});
|
||||
|
||||
(*gpio::GPPUD).write(0); // enable pins 14 and 15
|
||||
for _ in 0..150 {
|
||||
asm::nop();
|
||||
}
|
||||
|
||||
(*gpio::GPPUDCLK0).write((1 << 14) | (1 << 15));
|
||||
for _ in 0..150 {
|
||||
asm::nop();
|
||||
}
|
||||
(*gpio::GPPUDCLK0).write(0);
|
||||
|
||||
self.ICR.write(0x7FF); // clear interrupts
|
||||
self.IBRD.write(2); // 115200 baud
|
||||
self.FBRD.write(0xB);
|
||||
self.LCRH.write(0b11 << 5); // 8n1
|
||||
self.CR.write(0x301); // enable Tx, Rx, FIFO
|
||||
}
|
||||
|
||||
Ok(())
|
||||
}
|
||||
|
||||
/// Send a character
|
||||
pub fn send(&self, c: char) {
|
||||
// wait until we can send
|
||||
loop {
|
||||
if (self.FR.read() & 0x20) != 0x20 {
|
||||
break;
|
||||
}
|
||||
|
||||
asm::nop();
|
||||
}
|
||||
|
||||
// write the character to the buffer
|
||||
unsafe { self.DR.write(c as u32) };
|
||||
}
|
||||
|
||||
/// Receive a character
|
||||
pub fn getc(&self) -> char {
|
||||
// wait until something is in the buffer
|
||||
loop {
|
||||
if (self.FR.read() & 0x10) != 0x10 {
|
||||
break;
|
||||
}
|
||||
|
||||
asm::nop();
|
||||
}
|
||||
|
||||
// read it and return
|
||||
let mut ret = self.DR.read() as u8 as char;
|
||||
|
||||
// convert carrige return to newline
|
||||
if ret == '\r' {
|
||||
ret = '\n'
|
||||
}
|
||||
|
||||
ret
|
||||
}
|
||||
|
||||
/// Display a string
|
||||
pub fn puts(&self, string: &str) {
|
||||
for c in string.chars() {
|
||||
// convert newline to carrige return + newline
|
||||
if c == '\n' {
|
||||
self.send('\r')
|
||||
}
|
||||
|
||||
self.send(c);
|
||||
}
|
||||
}
|
||||
}
|
||||
Loading…
Reference in New Issue