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Bump UART to 576000 baud

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pull/99/head
Andre Richter 3 years ago
parent 269df3e25d
commit ee52e8e288
No known key found for this signature in database
GPG Key ID: 2116C1AB102F615E
19 changed files with 127 additions and 103 deletions
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18
06_drivers_gpio_uart/README.md
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@ -433,7 +433,7 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 06_drivers_g
diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
--- 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -0,0 +1,305 @@
@@ -0,0 +1,307 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2018-2021 Andre Richter <andre.o.richter@gmail.com>
@ -610,19 +610,21 @@ diff -uNr 05_safe_globals/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 06_dri
+
+ /// Set up baud rate and characteristics.
+ ///
+ /// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
+ /// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
+ /// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
+ /// approximation we can get. A 5 modulo error margin is acceptable for UART and we're now at 0,01 modulo.
+ /// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
+ ///
+ /// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
+ /// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
+ /// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
+ ///
+ /// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
+ /// give the best approximation we can get. A 5 modulo error margin is acceptable for UART and we're
+ /// now at 0.01 modulo.
+ pub fn init(&mut self) {
+ // Turn it off temporarily.
+ self.registers.CR.set(0);
+
+ self.registers.ICR.write(ICR::ALL::CLEAR);
+ self.registers.IBRD.write(IBRD::IBRD.val(13));
+ self.registers.FBRD.write(FBRD::FBRD.val(1));
+ self.registers.IBRD.write(IBRD::IBRD.val(5));
+ self.registers.FBRD.write(FBRD::FBRD.val(13));
+ self.registers
+ .LCRH
+ .write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on

16
06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
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@ -174,19 +174,21 @@ impl PL011UartInner {
/// Set up baud rate and characteristics.
///
/// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
/// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
/// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
/// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
/// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
///
/// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
/// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
/// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
///
/// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
/// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
/// now at 0.01 %.
pub fn init(&mut self) {
// Turn it off temporarily.
self.registers.CR.set(0);
self.registers.ICR.write(ICR::ALL::CLEAR);
self.registers.IBRD.write(IBRD::IBRD.val(13));
self.registers.FBRD.write(FBRD::FBRD.val(1));
self.registers.IBRD.write(IBRD::IBRD.val(5));
self.registers.FBRD.write(FBRD::FBRD.val(13));
self.registers
.LCRH
.write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on

4
07_uart_chainloader/README.md
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@ -222,7 +222,7 @@ diff -uNr 06_drivers_gpio_uart/src/_arch/aarch64/cpu.rs 07_uart_chainloader/src/
diff -uNr 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
--- 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -268,6 +268,15 @@
@@ -270,6 +270,15 @@
// readability.
self.inner.lock(|inner| fmt::Write::write_fmt(inner, args))
}
@ -238,7 +238,7 @@ diff -uNr 06_drivers_gpio_uart/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 0
}
impl console::interface::Read for PL011Uart {
@@ -278,18 +287,20 @@
@@ -280,18 +289,20 @@
cpu::nop();
}

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16
07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
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@ -174,19 +174,21 @@ impl PL011UartInner {
/// Set up baud rate and characteristics.
///
/// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
/// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
/// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
/// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
/// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
///
/// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
/// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
/// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
///
/// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
/// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
/// now at 0.01 %.
pub fn init(&mut self) {
// Turn it off temporarily.
self.registers.CR.set(0);
self.registers.ICR.write(ICR::ALL::CLEAR);
self.registers.IBRD.write(IBRD::IBRD.val(13));
self.registers.FBRD.write(FBRD::FBRD.val(1));
self.registers.IBRD.write(IBRD::IBRD.val(5));
self.registers.FBRD.write(FBRD::FBRD.val(13));
self.registers
.LCRH
.write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on

2
08_timestamps/README.md
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@ -309,7 +309,7 @@ diff -uNr 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_gpio.rs 08_times
diff -uNr 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs 08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
--- 07_uart_chainloader/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
+++ 08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
@@ -287,11 +287,18 @@
@@ -289,11 +289,18 @@
cpu::nop();
}

16
08_timestamps/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
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@ -174,19 +174,21 @@ impl PL011UartInner {
/// Set up baud rate and characteristics.
///
/// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
/// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
/// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
/// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
/// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
///
/// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
/// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
/// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
///
/// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
/// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
/// now at 0.01 %.
pub fn init(&mut self) {
// Turn it off temporarily.
self.registers.CR.set(0);
self.registers.ICR.write(ICR::ALL::CLEAR);
self.registers.IBRD.write(IBRD::IBRD.val(13));
self.registers.FBRD.write(FBRD::FBRD.val(1));
self.registers.IBRD.write(IBRD::IBRD.val(5));
self.registers.FBRD.write(FBRD::FBRD.val(13));
self.registers
.LCRH
.write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on

16
09_hw_debug_JTAG/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
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@ -174,19 +174,21 @@ impl PL011UartInner {
/// Set up baud rate and characteristics.
///
/// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
/// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
/// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
/// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
/// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
///
/// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
/// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
/// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
///
/// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
/// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
/// now at 0.01 %.
pub fn init(&mut self) {
// Turn it off temporarily.
self.registers.CR.set(0);
self.registers.ICR.write(ICR::ALL::CLEAR);
self.registers.IBRD.write(IBRD::IBRD.val(13));
self.registers.FBRD.write(FBRD::FBRD.val(1));
self.registers.IBRD.write(IBRD::IBRD.val(5));
self.registers.FBRD.write(FBRD::FBRD.val(13));
self.registers
.LCRH
.write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on

16
10_privilege_level/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
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@ -174,19 +174,21 @@ impl PL011UartInner {
/// Set up baud rate and characteristics.
///
/// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
/// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
/// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
/// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
/// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
///
/// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
/// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
/// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
///
/// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
/// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
/// now at 0.01 %.
pub fn init(&mut self) {
// Turn it off temporarily.
self.registers.CR.set(0);
self.registers.ICR.write(ICR::ALL::CLEAR);
self.registers.IBRD.write(IBRD::IBRD.val(13));
self.registers.FBRD.write(FBRD::FBRD.val(1));
self.registers.IBRD.write(IBRD::IBRD.val(5));
self.registers.FBRD.write(FBRD::FBRD.val(13));
self.registers
.LCRH
.write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on

16
11_virtual_mem_part1_identity_mapping/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
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@ -174,19 +174,21 @@ impl PL011UartInner {
/// Set up baud rate and characteristics.
///
/// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
/// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
/// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
/// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
/// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
///
/// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
/// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
/// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
///
/// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
/// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
/// now at 0.01 %.
pub fn init(&mut self) {
// Turn it off temporarily.
self.registers.CR.set(0);
self.registers.ICR.write(ICR::ALL::CLEAR);
self.registers.IBRD.write(IBRD::IBRD.val(13));
self.registers.FBRD.write(FBRD::FBRD.val(1));
self.registers.IBRD.write(IBRD::IBRD.val(5));
self.registers.FBRD.write(FBRD::FBRD.val(13));
self.registers
.LCRH
.write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on

16
12_exceptions_part1_groundwork/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
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@ -174,19 +174,21 @@ impl PL011UartInner {
/// Set up baud rate and characteristics.
///
/// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
/// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
/// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
/// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
/// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
///
/// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
/// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
/// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
///
/// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
/// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
/// now at 0.01 %.
pub fn init(&mut self) {
// Turn it off temporarily.
self.registers.CR.set(0);
self.registers.ICR.write(ICR::ALL::CLEAR);
self.registers.IBRD.write(IBRD::IBRD.val(13));
self.registers.FBRD.write(FBRD::FBRD.val(1));
self.registers.IBRD.write(IBRD::IBRD.val(5));
self.registers.FBRD.write(FBRD::FBRD.val(13));
self.registers
.LCRH
.write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on

16
13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
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@ -174,19 +174,21 @@ impl PL011UartInner {
/// Set up baud rate and characteristics.
///
/// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
/// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
/// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
/// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
/// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
///
/// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
/// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
/// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
///
/// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
/// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
/// now at 0.01 %.
pub fn init(&mut self) {
// Turn it off temporarily.
self.registers.CR.set(0);
self.registers.ICR.write(ICR::ALL::CLEAR);
self.registers.IBRD.write(IBRD::IBRD.val(13));
self.registers.FBRD.write(FBRD::FBRD.val(1));
self.registers.IBRD.write(IBRD::IBRD.val(5));
self.registers.FBRD.write(FBRD::FBRD.val(13));
self.registers
.LCRH
.write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on

12
14_exceptions_part2_peripheral_IRQs/README.md
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@ -1885,7 +1885,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
}
//--------------------------------------------------------------------------------------------------
@@ -190,6 +242,10 @@
@@ -192,6 +244,10 @@
self.registers
.LCRH
.write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on
@ -1896,7 +1896,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
self.registers
.CR
.write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
@@ -207,6 +263,35 @@
@@ -209,6 +265,35 @@
self.chars_written += 1;
}
@ -1932,7 +1932,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
}
/// Implementing `core::fmt::Write` enables usage of the `format_args!` macros, which in turn are
@@ -229,12 +314,18 @@
@@ -231,12 +316,18 @@
}
impl PL011Uart {
@ -1953,7 +1953,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
}
}
}
@@ -254,6 +345,21 @@
@@ -256,6 +347,21 @@
Ok(())
}
@ -1975,7 +1975,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
}
impl console::interface::Write for PL011Uart {
@@ -281,25 +387,8 @@
@@ -283,25 +389,8 @@
impl console::interface::Read for PL011Uart {
fn read_char(&self) -> char {
@ -2003,7 +2003,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
}
fn clear(&self) {
@@ -321,3 +410,24 @@
@@ -323,3 +412,24 @@
self.inner.lock(|inner| inner.chars_read)
}
}

16
14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
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@ -226,19 +226,21 @@ impl PL011UartInner {
/// Set up baud rate and characteristics.
///
/// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
/// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
/// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
/// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
/// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
///
/// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
/// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
/// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
///
/// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
/// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
/// now at 0.01 %.
pub fn init(&mut self) {
// Turn it off temporarily.
self.registers.CR.set(0);
self.registers.ICR.write(ICR::ALL::CLEAR);
self.registers.IBRD.write(IBRD::IBRD.val(13));
self.registers.FBRD.write(FBRD::FBRD.val(1));
self.registers.IBRD.write(IBRD::IBRD.val(5));
self.registers.FBRD.write(FBRD::FBRD.val(13));
self.registers
.LCRH
.write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on

16
15_virtual_mem_part2_mmio_remap/README.md
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@ -1304,10 +1304,10 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
inner: IRQSafeNullLock<PL011UartInner>,
irq_number: bsp::device_driver::IRQNumber,
}
@@ -232,7 +237,15 @@
/// approximation we can get. A 5 modulo error margin is acceptable for UART and we're now at 0,01 modulo.
///
/// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
@@ -234,7 +239,15 @@
/// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
/// give the best approximation we can get. A 5 modulo error margin is acceptable for UART and we're
/// now at 0.01 modulo.
- pub fn init(&mut self) {
+ ///
+ /// # Safety
@ -1321,7 +1321,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
// Turn it off temporarily.
self.registers.CR.set(0);
@@ -249,6 +262,8 @@
@@ -251,6 +264,8 @@
self.registers
.CR
.write(CR::UARTEN::Enabled + CR::TXE::Enabled + CR::RXE::Enabled);
@ -1330,7 +1330,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
}
/// Send a character.
@@ -318,13 +333,18 @@
@@ -320,13 +335,18 @@
///
/// # Safety
///
@ -1352,7 +1352,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
irq_number,
}
}
@@ -341,7 +361,14 @@
@@ -343,7 +363,14 @@
}
unsafe fn init(&self) -> Result<(), &'static str> {
@ -1368,7 +1368,7 @@ diff -uNr 14_exceptions_part2_peripheral_IRQs/src/bsp/device_driver/bcm/bcm2xxx_
Ok(())
}
@@ -360,6 +387,16 @@
@@ -362,6 +389,16 @@
Ok(())
}

16
15_virtual_mem_part2_mmio_remap/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
Unescape Escape View File

@ -231,12 +231,14 @@ impl PL011UartInner {
/// Set up baud rate and characteristics.
///
/// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
/// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
/// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
/// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
/// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
///
/// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
/// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
/// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
///
/// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
/// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
/// now at 0.01 %.
///
/// # Safety
///
@ -250,8 +252,8 @@ impl PL011UartInner {
self.registers.CR.set(0);
self.registers.ICR.write(ICR::ALL::CLEAR);
self.registers.IBRD.write(IBRD::IBRD.val(13));
self.registers.FBRD.write(FBRD::FBRD.val(1));
self.registers.IBRD.write(IBRD::IBRD.val(5));
self.registers.FBRD.write(FBRD::FBRD.val(13));
self.registers
.LCRH
.write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on

16
X1_JTAG_boot/src/bsp/device_driver/bcm/bcm2xxx_pl011_uart.rs
Unescape Escape View File

@ -174,19 +174,21 @@ impl PL011UartInner {
/// Set up baud rate and characteristics.
///
/// The calculation for the BRD given a target rate of 2300400 and a clock set to 48 MHz is:
/// `(48_000_000/16)/230400 = 13,02083`. `13` goes to the `IBRD` (integer field). The `FBRD`
/// (fractional field) is only 6 bits so `0,0208*64 = 1,3312 rounded to 1` will give the best
/// approximation we can get. A 5 % error margin is acceptable for UART and we're now at 0,01 %.
/// This results in 8N1 and 576000 baud (we set the clock to 48 MHz in config.txt).
///
/// This results in 8N1 and 230400 baud (we set the clock to 48 MHz in config.txt).
/// The calculation for the BRD given a target rate of 576000 and a clock set to 48 MHz is:
/// `(48_000_000 / 16) / 576000 = 5.2083`. `5` goes to the `IBRD` (integer field).
///
/// The `FBRD` (fractional field) is only 6 bits so `0.2083 * 64 = 13.3 rounded to 13` will
/// give the best approximation we can get. A 5 % error margin is acceptable for UART and we're
/// now at 0.01 %.
pub fn init(&mut self) {
// Turn it off temporarily.
self.registers.CR.set(0);
self.registers.ICR.write(ICR::ALL::CLEAR);
self.registers.IBRD.write(IBRD::IBRD.val(13));
self.registers.FBRD.write(FBRD::FBRD.val(1));
self.registers.IBRD.write(IBRD::IBRD.val(5));
self.registers.FBRD.write(FBRD::FBRD.val(13));
self.registers
.LCRH
.write(LCRH::WLEN::EightBit + LCRH::FEN::FifosEnabled); // 8N1 + Fifo on

2
utils/miniterm.rb
Unescape Escape View File

@ -41,7 +41,7 @@ class MiniTerm
def open_serial
wait_for_serial
@target_serial = SerialPort.new(@target_serial_name, 230_400, 8, 1, SerialPort::NONE)
@target_serial = SerialPort.new(@target_serial_name, 576_000, 8, 1, SerialPort::NONE)
# Ensure all output is immediately flushed to the device.
@target_serial.sync = true

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