From ee771e5ba6ebffa65f149b09da15c9026fad9e97 Mon Sep 17 00:00:00 2001 From: Andre Richter Date: Mon, 29 Jun 2020 22:41:04 +0200 Subject: [PATCH] Adapt image sizes where it makes sense --- 09_hw_debug_JTAG/README.md | 2 +- 11_virtual_memory/README.md | 2 +- 14_exceptions_part2_peripheral_IRQs/README.md | 6 +++--- README.CN.md | 4 ++-- 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/09_hw_debug_JTAG/README.md b/09_hw_debug_JTAG/README.md index 43719305..53a516b5 100644 --- a/09_hw_debug_JTAG/README.md +++ b/09_hw_debug_JTAG/README.md @@ -10,7 +10,7 @@ In the exact order as listed: 4. In new terminal, `make openocd` and keep terminal open. 5. In new terminal, `make gdb` or make `make gdb-opt0`. - +![Demo](../doc/09_demo.gif) ## Table of Contents diff --git a/11_virtual_memory/README.md b/11_virtual_memory/README.md index 935646db..81b6e069 100644 --- a/11_virtual_memory/README.md +++ b/11_virtual_memory/README.md @@ -208,7 +208,7 @@ The following block diagram visualizes the underlying translation for the second ### Address translation using a 64 KiB page descriptor - +Page Tables 64KiB ## Zero-cost abstraction diff --git a/14_exceptions_part2_peripheral_IRQs/README.md b/14_exceptions_part2_peripheral_IRQs/README.md index 82c6ad43..3646b384 100644 --- a/14_exceptions_part2_peripheral_IRQs/README.md +++ b/14_exceptions_part2_peripheral_IRQs/README.md @@ -8,7 +8,7 @@ - Handling for our first peripheral IRQ is implemented: The `UART`'s receive IRQ - one IRQ per received character. - +![Header](../doc/14_header.png) ## Table of Contents @@ -443,7 +443,7 @@ IRQs can be routed to _one core only_. In our case, we leave the default unchang everything is routed to the boot CPU core. The image below depicts the `struct diagram` of the driver implementation. - +![BCM Driver](../doc/14_BCM_driver.png) We have a top-level driver, which implements the `IRQManager` trait. _Only the top-level driver_ is exposed to the rest of the `kernel`. The top-level itself has two members, representing the local @@ -567,7 +567,7 @@ In summary, this means that any registers in the `GICD` that deal with the core- are banked. Since there is one `GICC` per CPU core, the whole thing is banked. This allows us to design the following `struct diagram` for our driver implementation: - +![GICv2 Driver](../doc/14_GICv2_driver.png) The top-level struct is composed of a `GICD`, a `GICC` and a `HandlerTable`. The latter is implemented identically as in the `Pi 3`. diff --git a/README.CN.md b/README.CN.md index 7e62b1fa..40b59ba6 100644 --- a/README.CN.md +++ b/README.CN.md @@ -4,7 +4,7 @@
- + ## ℹ️ 介绍 @@ -36,7 +36,7 @@ _带上我最诚挚的问候,
Andre ([@andre-richter])_ ### `make doc` 的输出 - +![make doc](doc/make_doc.png) [Visual Studio Code]: https://code.visualstudio.com [Rust Analyzer]: https://rust-analyzer.github.io