From f6190f85b7e1907d06cc79aa6c6b9afa45cae891 Mon Sep 17 00:00:00 2001 From: Andre Richter Date: Tue, 3 May 2022 23:53:45 +0200 Subject: [PATCH] ASM: Remove use of .equ The LLVM assembler apparently causes the .equ directive to create symbols instead of just a local and temporary variable. Work around this by using const operands with global_asm!. --- 01_wait_forever/src/_arch/aarch64/cpu/boot.rs | 4 +- 02_runtime_init/README.md | 23 +++++--- 02_runtime_init/src/_arch/aarch64/cpu/boot.rs | 7 ++- 02_runtime_init/src/_arch/aarch64/cpu/boot.s | 4 +- 02_runtime_init/src/main.rs | 1 + 03_hacky_hello_world/README.md | 6 +- .../src/_arch/aarch64/cpu/boot.rs | 7 ++- .../src/_arch/aarch64/cpu/boot.s | 4 +- 03_hacky_hello_world/src/main.rs | 1 + 04_safe_globals/README.md | 8 +-- 04_safe_globals/src/_arch/aarch64/cpu/boot.rs | 7 ++- 04_safe_globals/src/_arch/aarch64/cpu/boot.s | 4 +- 04_safe_globals/src/main.rs | 1 + 05_drivers_gpio_uart/README.md | 6 +- .../src/_arch/aarch64/cpu/boot.rs | 7 ++- .../src/_arch/aarch64/cpu/boot.s | 4 +- 05_drivers_gpio_uart/src/main.rs | 1 + 06_uart_chainloader/README.md | 8 +-- 06_uart_chainloader/demo_payload_rpi3.img | Bin 7960 -> 7960 bytes 06_uart_chainloader/demo_payload_rpi4.img | Bin 7872 -> 7872 bytes .../src/_arch/aarch64/cpu/boot.rs | 7 ++- .../src/_arch/aarch64/cpu/boot.s | 4 +- 06_uart_chainloader/src/main.rs | 1 + 07_timestamps/README.md | 10 ++-- 07_timestamps/src/_arch/aarch64/cpu/boot.rs | 7 ++- 07_timestamps/src/_arch/aarch64/cpu/boot.s | 4 +- 07_timestamps/src/main.rs | 1 + .../src/_arch/aarch64/cpu/boot.rs | 7 ++- 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s | 4 +- 08_hw_debug_JTAG/src/main.rs | 1 + 09_privilege_level/README.md | 53 ++++++++---------- .../src/_arch/aarch64/cpu/boot.rs | 6 +- .../src/_arch/aarch64/cpu/boot.s | 7 +-- 09_privilege_level/src/main.rs | 1 + .../README.md | 11 ++-- .../src/_arch/aarch64/cpu/boot.rs | 6 +- .../src/_arch/aarch64/cpu/boot.s | 7 +-- .../src/main.rs | 1 + 11_exceptions_part1_groundwork/README.md | 4 +- .../src/_arch/aarch64/cpu/boot.rs | 6 +- .../src/_arch/aarch64/cpu/boot.s | 7 +-- 11_exceptions_part1_groundwork/src/main.rs | 1 + .../kernel/src/_arch/aarch64/cpu/boot.rs | 6 +- .../kernel/src/_arch/aarch64/cpu/boot.s | 7 +-- 12_integrated_testing/kernel/src/lib.rs | 1 + 13_exceptions_part2_peripheral_IRQs/README.md | 10 +--- .../kernel/src/_arch/aarch64/cpu/boot.rs | 6 +- .../kernel/src/_arch/aarch64/cpu/boot.s | 7 +-- .../kernel/src/_arch/aarch64/cpu/boot.rs | 6 +- .../kernel/src/_arch/aarch64/cpu/boot.s | 7 +-- .../README.md | 4 +- .../kernel/src/_arch/aarch64/cpu/boot.rs | 6 +- .../kernel/src/_arch/aarch64/cpu/boot.s | 7 +-- .../README.md | 14 ++--- .../kernel/src/_arch/aarch64/cpu/boot.rs | 6 +- .../kernel/src/_arch/aarch64/cpu/boot.s | 7 +-- .../kernel/src/_arch/aarch64/cpu/boot.rs | 6 +- .../kernel/src/_arch/aarch64/cpu/boot.s | 7 +-- 18_backtrace/README.md | 25 +++++++-- .../kernel/src/_arch/aarch64/cpu/boot.rs | 6 +- .../kernel/src/_arch/aarch64/cpu/boot.s | 7 +-- .../kernel/src/_arch/aarch64/exception.rs | 6 +- .../kernel/src/_arch/aarch64/exception.s | 4 +- X1_JTAG_boot/jtag_boot_rpi3.img | Bin 9000 -> 9000 bytes X1_JTAG_boot/jtag_boot_rpi4.img | Bin 7888 -> 7888 bytes X1_JTAG_boot/src/_arch/aarch64/cpu/boot.rs | 7 ++- X1_JTAG_boot/src/_arch/aarch64/cpu/boot.s | 4 +- X1_JTAG_boot/src/main.rs | 1 + 68 files changed, 244 insertions(+), 182 deletions(-) diff --git a/01_wait_forever/src/_arch/aarch64/cpu/boot.rs b/01_wait_forever/src/_arch/aarch64/cpu/boot.rs index b5cc68fc..77d3d99f 100644 --- a/01_wait_forever/src/_arch/aarch64/cpu/boot.rs +++ b/01_wait_forever/src/_arch/aarch64/cpu/boot.rs @@ -11,5 +11,7 @@ //! //! crate::cpu::boot::arch_boot +use core::arch::global_asm; + // Assembly counterpart to this file. -core::arch::global_asm!(include_str!("boot.s")); +global_asm!(include_str!("boot.s")); diff --git a/02_runtime_init/README.md b/02_runtime_init/README.md index 02ed0488..7e4f5c0a 100644 --- a/02_runtime_init/README.md +++ b/02_runtime_init/README.md @@ -65,10 +65,15 @@ diff -uNr 01_wait_forever/Makefile 02_runtime_init/Makefile diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.rs 02_runtime_init/src/_arch/aarch64/cpu/boot.rs --- 01_wait_forever/src/_arch/aarch64/cpu/boot.rs +++ 02_runtime_init/src/_arch/aarch64/cpu/boot.rs -@@ -13,3 +13,15 @@ +@@ -14,4 +14,19 @@ + use core::arch::global_asm; // Assembly counterpart to this file. - core::arch::global_asm!(include_str!("boot.s")); +-global_asm!(include_str!("boot.s")); ++global_asm!( ++ include_str!("boot.s"), ++ CONST_CORE_ID_MASK = const 0b11 ++); + +//-------------------------------------------------------------------------------------------------- +// Public Code @@ -85,7 +90,7 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.rs 02_runtime_init/src/_arc diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.s 02_runtime_init/src/_arch/aarch64/cpu/boot.s --- 01_wait_forever/src/_arch/aarch64/cpu/boot.s +++ 02_runtime_init/src/_arch/aarch64/cpu/boot.s -@@ -3,6 +3,24 @@ +@@ -3,6 +3,22 @@ // Copyright (c) 2021-2022 Andre Richter //-------------------------------------------------------------------------------------------------- @@ -104,19 +109,17 @@ diff -uNr 01_wait_forever/src/_arch/aarch64/cpu/boot.s 02_runtime_init/src/_arch + add \register, \register, #:lo12:\symbol +.endm + -+.equ _core_id_mask, 0b11 -+ +//-------------------------------------------------------------------------------------------------- // Public Code //-------------------------------------------------------------------------------------------------- .section .text._start -@@ -11,6 +29,34 @@ +@@ -11,6 +27,34 @@ // fn _start() //------------------------------------------------------------------------------ _start: + // Only proceed on the boot core. Park it otherwise. + mrs x1, MPIDR_EL1 -+ and x1, x1, _core_id_mask ++ and x1, x1, {CONST_CORE_ID_MASK} + ldr x2, BOOT_CORE_ID // provided by bsp/__board_name__/cpu.rs + cmp x1, x2 + b.ne .L_parking_loop @@ -302,15 +305,17 @@ diff -uNr 01_wait_forever/src/cpu.rs 02_runtime_init/src/cpu.rs diff -uNr 01_wait_forever/src/main.rs 02_runtime_init/src/main.rs --- 01_wait_forever/src/main.rs +++ 02_runtime_init/src/main.rs -@@ -104,6 +104,7 @@ +@@ -104,7 +104,9 @@ //! //! 1. The kernel's entry point is the function `cpu::boot::arch_boot::_start()`. //! - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`. +//! 2. Once finished with architectural setup, the arch code calls `kernel_init()`. ++#![feature(asm_const)] #![no_main] #![no_std] -@@ -112,4 +113,11 @@ + +@@ -112,4 +114,11 @@ mod cpu; mod panic_wait; diff --git a/02_runtime_init/src/_arch/aarch64/cpu/boot.rs b/02_runtime_init/src/_arch/aarch64/cpu/boot.rs index 2f9654c7..8390c013 100644 --- a/02_runtime_init/src/_arch/aarch64/cpu/boot.rs +++ b/02_runtime_init/src/_arch/aarch64/cpu/boot.rs @@ -11,8 +11,13 @@ //! //! crate::cpu::boot::arch_boot +use core::arch::global_asm; + // Assembly counterpart to this file. -core::arch::global_asm!(include_str!("boot.s")); +global_asm!( + include_str!("boot.s"), + CONST_CORE_ID_MASK = const 0b11 +); //-------------------------------------------------------------------------------------------------- // Public Code diff --git a/02_runtime_init/src/_arch/aarch64/cpu/boot.s b/02_runtime_init/src/_arch/aarch64/cpu/boot.s index 7d445a93..1f70169f 100644 --- a/02_runtime_init/src/_arch/aarch64/cpu/boot.s +++ b/02_runtime_init/src/_arch/aarch64/cpu/boot.s @@ -18,8 +18,6 @@ add \register, \register, #:lo12:\symbol .endm -.equ _core_id_mask, 0b11 - //-------------------------------------------------------------------------------------------------- // Public Code //-------------------------------------------------------------------------------------------------- @@ -31,7 +29,7 @@ _start: // Only proceed on the boot core. Park it otherwise. mrs x1, MPIDR_EL1 - and x1, x1, _core_id_mask + and x1, x1, {CONST_CORE_ID_MASK} ldr x2, BOOT_CORE_ID // provided by bsp/__board_name__/cpu.rs cmp x1, x2 b.ne .L_parking_loop diff --git a/02_runtime_init/src/main.rs b/02_runtime_init/src/main.rs index 42653ac4..e16354ed 100644 --- a/02_runtime_init/src/main.rs +++ b/02_runtime_init/src/main.rs @@ -106,6 +106,7 @@ //! - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`. //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`. +#![feature(asm_const)] #![no_main] #![no_std] diff --git a/03_hacky_hello_world/README.md b/03_hacky_hello_world/README.md index 30a717e8..d868459f 100644 --- a/03_hacky_hello_world/README.md +++ b/03_hacky_hello_world/README.md @@ -212,10 +212,10 @@ diff -uNr 02_runtime_init/src/console.rs 03_hacky_hello_world/src/console.rs diff -uNr 02_runtime_init/src/main.rs 03_hacky_hello_world/src/main.rs --- 02_runtime_init/src/main.rs +++ 03_hacky_hello_world/src/main.rs -@@ -106,12 +106,16 @@ - //! - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`. +@@ -107,12 +107,16 @@ //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`. + #![feature(asm_const)] +#![feature(format_args_nl)] +#![feature(panic_info_message)] #![no_main] @@ -229,7 +229,7 @@ diff -uNr 02_runtime_init/src/main.rs 03_hacky_hello_world/src/main.rs /// Early init code. /// -@@ -119,5 +123,7 @@ +@@ -120,5 +124,7 @@ /// /// - Only a single core must be active and running this function. unsafe fn kernel_init() -> ! { diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs index 2f9654c7..8390c013 100644 --- a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs +++ b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.rs @@ -11,8 +11,13 @@ //! //! crate::cpu::boot::arch_boot +use core::arch::global_asm; + // Assembly counterpart to this file. -core::arch::global_asm!(include_str!("boot.s")); +global_asm!( + include_str!("boot.s"), + CONST_CORE_ID_MASK = const 0b11 +); //-------------------------------------------------------------------------------------------------- // Public Code diff --git a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s index 7d445a93..1f70169f 100644 --- a/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s +++ b/03_hacky_hello_world/src/_arch/aarch64/cpu/boot.s @@ -18,8 +18,6 @@ add \register, \register, #:lo12:\symbol .endm -.equ _core_id_mask, 0b11 - //-------------------------------------------------------------------------------------------------- // Public Code //-------------------------------------------------------------------------------------------------- @@ -31,7 +29,7 @@ _start: // Only proceed on the boot core. Park it otherwise. mrs x1, MPIDR_EL1 - and x1, x1, _core_id_mask + and x1, x1, {CONST_CORE_ID_MASK} ldr x2, BOOT_CORE_ID // provided by bsp/__board_name__/cpu.rs cmp x1, x2 b.ne .L_parking_loop diff --git a/03_hacky_hello_world/src/main.rs b/03_hacky_hello_world/src/main.rs index 67b0551b..74b621de 100644 --- a/03_hacky_hello_world/src/main.rs +++ b/03_hacky_hello_world/src/main.rs @@ -106,6 +106,7 @@ //! - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`. //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`. +#![feature(asm_const)] #![feature(format_args_nl)] #![feature(panic_info_message)] #![no_main] diff --git a/04_safe_globals/README.md b/04_safe_globals/README.md index 8eff4a67..18827b5c 100644 --- a/04_safe_globals/README.md +++ b/04_safe_globals/README.md @@ -224,15 +224,15 @@ diff -uNr 03_hacky_hello_world/src/console.rs 04_safe_globals/src/console.rs diff -uNr 03_hacky_hello_world/src/main.rs 04_safe_globals/src/main.rs --- 03_hacky_hello_world/src/main.rs +++ 04_safe_globals/src/main.rs -@@ -108,6 +108,7 @@ - +@@ -109,6 +109,7 @@ + #![feature(asm_const)] #![feature(format_args_nl)] #![feature(panic_info_message)] +#![feature(trait_alias)] #![no_main] #![no_std] -@@ -116,6 +117,7 @@ +@@ -117,6 +118,7 @@ mod cpu; mod panic_wait; mod print; @@ -240,7 +240,7 @@ diff -uNr 03_hacky_hello_world/src/main.rs 04_safe_globals/src/main.rs /// Early init code. /// -@@ -123,7 +125,15 @@ +@@ -124,7 +126,15 @@ /// /// - Only a single core must be active and running this function. unsafe fn kernel_init() -> ! { diff --git a/04_safe_globals/src/_arch/aarch64/cpu/boot.rs b/04_safe_globals/src/_arch/aarch64/cpu/boot.rs index 2f9654c7..8390c013 100644 --- a/04_safe_globals/src/_arch/aarch64/cpu/boot.rs +++ b/04_safe_globals/src/_arch/aarch64/cpu/boot.rs @@ -11,8 +11,13 @@ //! //! crate::cpu::boot::arch_boot +use core::arch::global_asm; + // Assembly counterpart to this file. -core::arch::global_asm!(include_str!("boot.s")); +global_asm!( + include_str!("boot.s"), + CONST_CORE_ID_MASK = const 0b11 +); //-------------------------------------------------------------------------------------------------- // Public Code diff --git a/04_safe_globals/src/_arch/aarch64/cpu/boot.s b/04_safe_globals/src/_arch/aarch64/cpu/boot.s index 7d445a93..1f70169f 100644 --- a/04_safe_globals/src/_arch/aarch64/cpu/boot.s +++ b/04_safe_globals/src/_arch/aarch64/cpu/boot.s @@ -18,8 +18,6 @@ add \register, \register, #:lo12:\symbol .endm -.equ _core_id_mask, 0b11 - //-------------------------------------------------------------------------------------------------- // Public Code //-------------------------------------------------------------------------------------------------- @@ -31,7 +29,7 @@ _start: // Only proceed on the boot core. Park it otherwise. mrs x1, MPIDR_EL1 - and x1, x1, _core_id_mask + and x1, x1, {CONST_CORE_ID_MASK} ldr x2, BOOT_CORE_ID // provided by bsp/__board_name__/cpu.rs cmp x1, x2 b.ne .L_parking_loop diff --git a/04_safe_globals/src/main.rs b/04_safe_globals/src/main.rs index b45e3a35..15db4a21 100644 --- a/04_safe_globals/src/main.rs +++ b/04_safe_globals/src/main.rs @@ -106,6 +106,7 @@ //! - It is implemented in `src/_arch/__arch_name__/cpu/boot.s`. //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`. +#![feature(asm_const)] #![feature(format_args_nl)] #![feature(panic_info_message)] #![feature(trait_alias)] diff --git a/05_drivers_gpio_uart/README.md b/05_drivers_gpio_uart/README.md index 5787ac12..6f0057d6 100644 --- a/05_drivers_gpio_uart/README.md +++ b/05_drivers_gpio_uart/README.md @@ -1342,10 +1342,10 @@ diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`. +#![allow(clippy::upper_case_acronyms)] + #![feature(asm_const)] #![feature(format_args_nl)] #![feature(panic_info_message)] - #![feature(trait_alias)] -@@ -115,6 +116,7 @@ +@@ -116,6 +117,7 @@ mod bsp; mod console; mod cpu; @@ -1353,7 +1353,7 @@ diff -uNr 04_safe_globals/src/main.rs 05_drivers_gpio_uart/src/main.rs mod panic_wait; mod print; mod synchronization; -@@ -124,16 +126,54 @@ +@@ -125,16 +127,54 @@ /// # Safety /// /// - Only a single core must be active and running this function. diff --git a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs index 2f9654c7..8390c013 100644 --- a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs +++ b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.rs @@ -11,8 +11,13 @@ //! //! crate::cpu::boot::arch_boot +use core::arch::global_asm; + // Assembly counterpart to this file. -core::arch::global_asm!(include_str!("boot.s")); +global_asm!( + include_str!("boot.s"), + CONST_CORE_ID_MASK = const 0b11 +); //-------------------------------------------------------------------------------------------------- // Public Code diff --git a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s index 7d445a93..1f70169f 100644 --- a/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s +++ b/05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s @@ -18,8 +18,6 @@ add \register, \register, #:lo12:\symbol .endm -.equ _core_id_mask, 0b11 - //-------------------------------------------------------------------------------------------------- // Public Code //-------------------------------------------------------------------------------------------------- @@ -31,7 +29,7 @@ _start: // Only proceed on the boot core. Park it otherwise. mrs x1, MPIDR_EL1 - and x1, x1, _core_id_mask + and x1, x1, {CONST_CORE_ID_MASK} ldr x2, BOOT_CORE_ID // provided by bsp/__board_name__/cpu.rs cmp x1, x2 b.ne .L_parking_loop diff --git a/05_drivers_gpio_uart/src/main.rs b/05_drivers_gpio_uart/src/main.rs index 9ee5a43c..2e8bfeaa 100644 --- a/05_drivers_gpio_uart/src/main.rs +++ b/05_drivers_gpio_uart/src/main.rs @@ -107,6 +107,7 @@ //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`. #![allow(clippy::upper_case_acronyms)] +#![feature(asm_const)] #![feature(format_args_nl)] #![feature(panic_info_message)] #![feature(trait_alias)] diff --git a/06_uart_chainloader/README.md b/06_uart_chainloader/README.md index 8c21ccfa..20c120d4 100644 --- a/06_uart_chainloader/README.md +++ b/06_uart_chainloader/README.md @@ -277,10 +277,10 @@ diff -uNr 05_drivers_gpio_uart/src/_arch/aarch64/cpu/boot.s 06_uart_chainloader/ + movk \register, #:abs_g0_nc:\symbol +.endm + - .equ _core_id_mask, 0b11 - //-------------------------------------------------------------------------------------------------- -@@ -39,23 +50,35 @@ + // Public Code + //-------------------------------------------------------------------------------------------------- +@@ -37,23 +48,35 @@ // If execution reaches here, it is the boot core. // Initialize DRAM. @@ -457,7 +457,7 @@ diff -uNr 05_drivers_gpio_uart/src/bsp/raspberrypi/memory.rs 06_uart_chainloader diff -uNr 05_drivers_gpio_uart/src/main.rs 06_uart_chainloader/src/main.rs --- 05_drivers_gpio_uart/src/main.rs +++ 06_uart_chainloader/src/main.rs -@@ -142,38 +142,56 @@ +@@ -143,38 +143,56 @@ kernel_main() } diff --git a/06_uart_chainloader/demo_payload_rpi3.img b/06_uart_chainloader/demo_payload_rpi3.img index b422ad25ac3df2dfa5f0d19917a13ebc15e3944a..1da3bec56b3f76bf826e7d2f7f8c513059965b8c 100755 GIT binary patch delta 14 VcmbPXH^Xj&gbZWHW=Wa `EL1` transition by calling @@ -211,19 +211,21 @@ diff -uNr 08_hw_debug_JTAG/Cargo.toml 09_privilege_level/Cargo.toml diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs 09_privilege_level/src/_arch/aarch64/cpu/boot.rs --- 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs +++ 09_privilege_level/src/_arch/aarch64/cpu/boot.rs -@@ -11,8 +11,53 @@ - //! +@@ -12,21 +12,72 @@ //! crate::cpu::boot::arch_boot -+use core::arch::global_asm; + use core::arch::global_asm; +use cortex_a::{asm, registers::*}; +use tock_registers::interfaces::Writeable; -+ + // Assembly counterpart to this file. --core::arch::global_asm!(include_str!("boot.s")); -+global_asm!(include_str!("boot.s")); -+ -+//-------------------------------------------------------------------------------------------------- + global_asm!( + include_str!("boot.s"), ++ CONST_CURRENTEL_EL2 = const 0x8, + CONST_CORE_ID_MASK = const 0b11 + ); + + //-------------------------------------------------------------------------------------------------- +// Private Code +//-------------------------------------------------------------------------------------------------- + @@ -263,10 +265,11 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs 09_privilege_level/src/ + // are no plans to ever return to EL2, just re-use the same stack. + SP_EL1.set(phys_boot_core_stack_end_exclusive_addr); +} - - //-------------------------------------------------------------------------------------------------- ++ ++//-------------------------------------------------------------------------------------------------- // Public Code -@@ -21,7 +66,14 @@ + //-------------------------------------------------------------------------------------------------- + /// The Rust entry of the `kernel` binary. /// /// The function is called from the assembly `_start` function. @@ -287,27 +290,19 @@ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.rs 09_privilege_level/src/ diff -uNr 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s 09_privilege_level/src/_arch/aarch64/cpu/boot.s --- 08_hw_debug_JTAG/src/_arch/aarch64/cpu/boot.s +++ 09_privilege_level/src/_arch/aarch64/cpu/boot.s -@@ -18,6 +18,7 @@ - add \register, \register, #:lo12:\symbol - .endm - -+.equ _EL2, 0x8 - .equ _core_id_mask, 0b11 - - //-------------------------------------------------------------------------------------------------- -@@ -29,6 +30,11 @@ +@@ -27,6 +27,11 @@ // fn _start() //------------------------------------------------------------------------------ _start: + // Only proceed if the core executes in EL2. Park it otherwise. + mrs x0, CurrentEL -+ cmp x0, _EL2 ++ cmp x0, {CONST_CURRENTEL_EL2} + b.ne .L_parking_loop + // Only proceed on the boot core. Park it otherwise. mrs x1, MPIDR_EL1 - and x1, x1, _core_id_mask -@@ -50,11 +56,11 @@ + and x1, x1, {CONST_CORE_ID_MASK} +@@ -48,11 +53,11 @@ // Prepare the jump to Rust code. .L_prepare_rust: @@ -502,7 +497,7 @@ diff -uNr 08_hw_debug_JTAG/src/exception.rs 09_privilege_level/src/exception.rs diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs --- 08_hw_debug_JTAG/src/main.rs +++ 09_privilege_level/src/main.rs -@@ -117,6 +117,7 @@ +@@ -118,6 +118,7 @@ mod console; mod cpu; mod driver; @@ -510,7 +505,7 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs mod panic_wait; mod print; mod synchronization; -@@ -145,6 +146,8 @@ +@@ -146,6 +147,8 @@ /// The main function running after the early init. fn kernel_main() -> ! { @@ -519,7 +514,7 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs use core::time::Duration; use driver::interface::DriverManager; use time::interface::TimeManager; -@@ -156,6 +159,12 @@ +@@ -157,6 +160,12 @@ ); info!("Booting on: {}", bsp::board_name()); @@ -532,7 +527,7 @@ diff -uNr 08_hw_debug_JTAG/src/main.rs 09_privilege_level/src/main.rs info!( "Architectural timer resolution: {} ns", time::time_manager().resolution().as_nanos() -@@ -170,11 +179,15 @@ +@@ -171,11 +180,15 @@ info!(" {}. {}", i + 1, driver.compatible()); } diff --git a/09_privilege_level/src/_arch/aarch64/cpu/boot.rs b/09_privilege_level/src/_arch/aarch64/cpu/boot.rs index f677c9c4..0bf45b83 100644 --- a/09_privilege_level/src/_arch/aarch64/cpu/boot.rs +++ b/09_privilege_level/src/_arch/aarch64/cpu/boot.rs @@ -16,7 +16,11 @@ use cortex_a::{asm, registers::*}; use tock_registers::interfaces::Writeable; // Assembly counterpart to this file. -global_asm!(include_str!("boot.s")); +global_asm!( + include_str!("boot.s"), + CONST_CURRENTEL_EL2 = const 0x8, + CONST_CORE_ID_MASK = const 0b11 +); //-------------------------------------------------------------------------------------------------- // Private Code diff --git a/09_privilege_level/src/_arch/aarch64/cpu/boot.s b/09_privilege_level/src/_arch/aarch64/cpu/boot.s index 28b35087..7576dc14 100644 --- a/09_privilege_level/src/_arch/aarch64/cpu/boot.s +++ b/09_privilege_level/src/_arch/aarch64/cpu/boot.s @@ -18,9 +18,6 @@ add \register, \register, #:lo12:\symbol .endm -.equ _EL2, 0x8 -.equ _core_id_mask, 0b11 - //-------------------------------------------------------------------------------------------------- // Public Code //-------------------------------------------------------------------------------------------------- @@ -32,12 +29,12 @@ _start: // Only proceed if the core executes in EL2. Park it otherwise. mrs x0, CurrentEL - cmp x0, _EL2 + cmp x0, {CONST_CURRENTEL_EL2} b.ne .L_parking_loop // Only proceed on the boot core. Park it otherwise. mrs x1, MPIDR_EL1 - and x1, x1, _core_id_mask + and x1, x1, {CONST_CORE_ID_MASK} ldr x2, BOOT_CORE_ID // provided by bsp/__board_name__/cpu.rs cmp x1, x2 b.ne .L_parking_loop diff --git a/09_privilege_level/src/main.rs b/09_privilege_level/src/main.rs index b1b1bc27..0c6a0dec 100644 --- a/09_privilege_level/src/main.rs +++ b/09_privilege_level/src/main.rs @@ -107,6 +107,7 @@ //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`. #![allow(clippy::upper_case_acronyms)] +#![feature(asm_const)] #![feature(format_args_nl)] #![feature(panic_info_message)] #![feature(trait_alias)] diff --git a/10_virtual_mem_part1_identity_mapping/README.md b/10_virtual_mem_part1_identity_mapping/README.md index 3a5539c9..802243c8 100644 --- a/10_virtual_mem_part1_identity_mapping/README.md +++ b/10_virtual_mem_part1_identity_mapping/README.md @@ -1081,16 +1081,17 @@ diff -uNr 09_privilege_level/src/bsp.rs 10_virtual_mem_part1_identity_mapping/sr diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/src/main.rs --- 09_privilege_level/src/main.rs +++ 10_virtual_mem_part1_identity_mapping/src/main.rs -@@ -107,6 +107,8 @@ +@@ -107,7 +107,9 @@ //! 2. Once finished with architectural setup, the arch code calls `kernel_init()`. #![allow(clippy::upper_case_acronyms)] +#![allow(incomplete_features)] + #![feature(asm_const)] +#![feature(core_intrinsics)] #![feature(format_args_nl)] #![feature(panic_info_message)] #![feature(trait_alias)] -@@ -118,6 +120,7 @@ +@@ -119,6 +121,7 @@ mod cpu; mod driver; mod exception; @@ -1098,7 +1099,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s mod panic_wait; mod print; mod synchronization; -@@ -128,9 +131,17 @@ +@@ -129,9 +132,17 @@ /// # Safety /// /// - Only a single core must be active and running this function. @@ -1117,7 +1118,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s for i in bsp::driver::driver_manager().all_device_drivers().iter() { if let Err(x) = i.init() { -@@ -159,6 +170,9 @@ +@@ -160,6 +171,9 @@ ); info!("Booting on: {}", bsp::board_name()); @@ -1127,7 +1128,7 @@ diff -uNr 09_privilege_level/src/main.rs 10_virtual_mem_part1_identity_mapping/s let (_, privilege_level) = exception::current_privilege_level(); info!("Current privilege level: {}", privilege_level); -@@ -182,6 +196,13 @@ +@@ -183,6 +197,13 @@ info!("Timer test, spinning for 1 second"); time::time_manager().spin_for(Duration::from_secs(1)); diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs index f677c9c4..0bf45b83 100644 --- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs +++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.rs @@ -16,7 +16,11 @@ use cortex_a::{asm, registers::*}; use tock_registers::interfaces::Writeable; // Assembly counterpart to this file. -global_asm!(include_str!("boot.s")); +global_asm!( + include_str!("boot.s"), + CONST_CURRENTEL_EL2 = const 0x8, + CONST_CORE_ID_MASK = const 0b11 +); //-------------------------------------------------------------------------------------------------- // Private Code diff --git a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s index 28b35087..7576dc14 100644 --- a/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s +++ b/10_virtual_mem_part1_identity_mapping/src/_arch/aarch64/cpu/boot.s @@ -18,9 +18,6 @@ add \register, \register, #:lo12:\symbol .endm -.equ _EL2, 0x8 -.equ _core_id_mask, 0b11 - //-------------------------------------------------------------------------------------------------- // Public Code //-------------------------------------------------------------------------------------------------- @@ -32,12 +29,12 @@ _start: // Only proceed if the core executes in EL2. Park it otherwise. mrs x0, CurrentEL - cmp x0, _EL2 + cmp x0, {CONST_CURRENTEL_EL2} b.ne .L_parking_loop // Only proceed on the boot core. Park it otherwise. mrs x1, MPIDR_EL1 - and x1, x1, _core_id_mask + and x1, x1, {CONST_CORE_ID_MASK} ldr x2, BOOT_CORE_ID // provided by bsp/__board_name__/cpu.rs cmp x1, x2 b.ne .L_parking_loop diff --git a/10_virtual_mem_part1_identity_mapping/src/main.rs b/10_virtual_mem_part1_identity_mapping/src/main.rs index 327f3ce0..dde224e7 100644 --- a/10_virtual_mem_part1_identity_mapping/src/main.rs +++ b/10_virtual_mem_part1_identity_mapping/src/main.rs @@ -108,6 +108,7 @@ #![allow(clippy::upper_case_acronyms)] #![allow(incomplete_features)] +#![feature(asm_const)] #![feature(core_intrinsics)] #![feature(format_args_nl)] #![feature(panic_info_message)] diff --git a/11_exceptions_part1_groundwork/README.md b/11_exceptions_part1_groundwork/README.md index d0b86c55..81e633be 100644 --- a/11_exceptions_part1_groundwork/README.md +++ b/11_exceptions_part1_groundwork/README.md @@ -1024,7 +1024,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/exception.rs 11_exceptions_p diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_groundwork/src/main.rs --- 10_virtual_mem_part1_identity_mapping/src/main.rs +++ 11_exceptions_part1_groundwork/src/main.rs -@@ -139,6 +139,8 @@ +@@ -140,6 +140,8 @@ use driver::interface::DriverManager; use memory::mmu::interface::MMU; @@ -1033,7 +1033,7 @@ diff -uNr 10_virtual_mem_part1_identity_mapping/src/main.rs 11_exceptions_part1_ if let Err(string) = memory::mmu::mmu().enable_mmu_and_caching() { panic!("MMU: {}", string); } -@@ -196,13 +198,28 @@ +@@ -197,13 +199,28 @@ info!("Timer test, spinning for 1 second"); time::time_manager().spin_for(Duration::from_secs(1)); diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs index f677c9c4..0bf45b83 100644 --- a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs +++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.rs @@ -16,7 +16,11 @@ use cortex_a::{asm, registers::*}; use tock_registers::interfaces::Writeable; // Assembly counterpart to this file. -global_asm!(include_str!("boot.s")); +global_asm!( + include_str!("boot.s"), + CONST_CURRENTEL_EL2 = const 0x8, + CONST_CORE_ID_MASK = const 0b11 +); //-------------------------------------------------------------------------------------------------- // Private Code diff --git a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s index 28b35087..7576dc14 100644 --- a/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s +++ b/11_exceptions_part1_groundwork/src/_arch/aarch64/cpu/boot.s @@ -18,9 +18,6 @@ add \register, \register, #:lo12:\symbol .endm -.equ _EL2, 0x8 -.equ _core_id_mask, 0b11 - //-------------------------------------------------------------------------------------------------- // Public Code //-------------------------------------------------------------------------------------------------- @@ -32,12 +29,12 @@ _start: // Only proceed if the core executes in EL2. Park it otherwise. mrs x0, CurrentEL - cmp x0, _EL2 + cmp x0, {CONST_CURRENTEL_EL2} b.ne .L_parking_loop // Only proceed on the boot core. Park it otherwise. mrs x1, MPIDR_EL1 - and x1, x1, _core_id_mask + and x1, x1, {CONST_CORE_ID_MASK} ldr x2, BOOT_CORE_ID // provided by bsp/__board_name__/cpu.rs cmp x1, x2 b.ne .L_parking_loop diff --git a/11_exceptions_part1_groundwork/src/main.rs b/11_exceptions_part1_groundwork/src/main.rs index 0c88c58e..96743601 100644 --- a/11_exceptions_part1_groundwork/src/main.rs +++ b/11_exceptions_part1_groundwork/src/main.rs @@ -108,6 +108,7 @@ #![allow(clippy::upper_case_acronyms)] #![allow(incomplete_features)] +#![feature(asm_const)] #![feature(core_intrinsics)] #![feature(format_args_nl)] #![feature(panic_info_message)] diff --git a/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.rs b/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.rs index f677c9c4..0bf45b83 100644 --- a/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.rs +++ b/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.rs @@ -16,7 +16,11 @@ use cortex_a::{asm, registers::*}; use tock_registers::interfaces::Writeable; // Assembly counterpart to this file. -global_asm!(include_str!("boot.s")); +global_asm!( + include_str!("boot.s"), + CONST_CURRENTEL_EL2 = const 0x8, + CONST_CORE_ID_MASK = const 0b11 +); //-------------------------------------------------------------------------------------------------- // Private Code diff --git a/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.s b/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.s index 28b35087..7576dc14 100644 --- a/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.s +++ b/12_integrated_testing/kernel/src/_arch/aarch64/cpu/boot.s @@ -18,9 +18,6 @@ add \register, \register, #:lo12:\symbol .endm -.equ _EL2, 0x8 -.equ _core_id_mask, 0b11 - //-------------------------------------------------------------------------------------------------- // Public Code //-------------------------------------------------------------------------------------------------- @@ -32,12 +29,12 @@ _start: // Only proceed if the core executes in EL2. Park it otherwise. mrs x0, CurrentEL - cmp x0, _EL2 + cmp x0, {CONST_CURRENTEL_EL2} b.ne .L_parking_loop // Only proceed on the boot core. Park it otherwise. mrs x1, MPIDR_EL1 - and x1, x1, _core_id_mask + and x1, x1, {CONST_CORE_ID_MASK} ldr x2, BOOT_CORE_ID // provided by bsp/__board_name__/cpu.rs cmp x1, x2 b.ne .L_parking_loop diff --git a/12_integrated_testing/kernel/src/lib.rs b/12_integrated_testing/kernel/src/lib.rs index 442de9e0..2de7d6cc 100644 --- a/12_integrated_testing/kernel/src/lib.rs +++ b/12_integrated_testing/kernel/src/lib.rs @@ -110,6 +110,7 @@ #![allow(clippy::upper_case_acronyms)] #![allow(incomplete_features)] +#![feature(asm_const)] #![feature(core_intrinsics)] #![feature(format_args_nl)] #![feature(linkage)] diff --git a/13_exceptions_part2_peripheral_IRQs/README.md b/13_exceptions_part2_peripheral_IRQs/README.md index 5938da9e..d6c6a7e4 100644 --- a/13_exceptions_part2_peripheral_IRQs/README.md +++ b/13_exceptions_part2_peripheral_IRQs/README.md @@ -2398,15 +2398,7 @@ diff -uNr 12_integrated_testing/kernel/src/exception/asynchronous.rs 13_exceptio diff -uNr 12_integrated_testing/kernel/src/lib.rs 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs --- 12_integrated_testing/kernel/src/lib.rs +++ 13_exceptions_part2_peripheral_IRQs/kernel/src/lib.rs -@@ -110,6 +110,7 @@ - - #![allow(clippy::upper_case_acronyms)] - #![allow(incomplete_features)] -+#![feature(asm_const)] - #![feature(core_intrinsics)] - #![feature(format_args_nl)] - #![feature(linkage)] -@@ -132,6 +133,7 @@ +@@ -133,6 +133,7 @@ pub mod exception; pub mod memory; pub mod print; diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.rs b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.rs index f677c9c4..0bf45b83 100644 --- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.rs +++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.rs @@ -16,7 +16,11 @@ use cortex_a::{asm, registers::*}; use tock_registers::interfaces::Writeable; // Assembly counterpart to this file. -global_asm!(include_str!("boot.s")); +global_asm!( + include_str!("boot.s"), + CONST_CURRENTEL_EL2 = const 0x8, + CONST_CORE_ID_MASK = const 0b11 +); //-------------------------------------------------------------------------------------------------- // Private Code diff --git a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.s b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.s index 28b35087..7576dc14 100644 --- a/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.s +++ b/13_exceptions_part2_peripheral_IRQs/kernel/src/_arch/aarch64/cpu/boot.s @@ -18,9 +18,6 @@ add \register, \register, #:lo12:\symbol .endm -.equ _EL2, 0x8 -.equ _core_id_mask, 0b11 - //-------------------------------------------------------------------------------------------------- // Public Code //-------------------------------------------------------------------------------------------------- @@ -32,12 +29,12 @@ _start: // Only proceed if the core executes in EL2. Park it otherwise. mrs x0, CurrentEL - cmp x0, _EL2 + cmp x0, {CONST_CURRENTEL_EL2} b.ne .L_parking_loop // Only proceed on the boot core. Park it otherwise. mrs x1, MPIDR_EL1 - and x1, x1, _core_id_mask + and x1, x1, {CONST_CORE_ID_MASK} ldr x2, BOOT_CORE_ID // provided by bsp/__board_name__/cpu.rs cmp x1, x2 b.ne .L_parking_loop diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs index f677c9c4..0bf45b83 100644 --- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs +++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs @@ -16,7 +16,11 @@ use cortex_a::{asm, registers::*}; use tock_registers::interfaces::Writeable; // Assembly counterpart to this file. -global_asm!(include_str!("boot.s")); +global_asm!( + include_str!("boot.s"), + CONST_CURRENTEL_EL2 = const 0x8, + CONST_CORE_ID_MASK = const 0b11 +); //-------------------------------------------------------------------------------------------------- // Private Code diff --git a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.s b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.s index 28b35087..7576dc14 100644 --- a/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.s +++ b/14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.s @@ -18,9 +18,6 @@ add \register, \register, #:lo12:\symbol .endm -.equ _EL2, 0x8 -.equ _core_id_mask, 0b11 - //-------------------------------------------------------------------------------------------------- // Public Code //-------------------------------------------------------------------------------------------------- @@ -32,12 +29,12 @@ _start: // Only proceed if the core executes in EL2. Park it otherwise. mrs x0, CurrentEL - cmp x0, _EL2 + cmp x0, {CONST_CURRENTEL_EL2} b.ne .L_parking_loop // Only proceed on the boot core. Park it otherwise. mrs x1, MPIDR_EL1 - and x1, x1, _core_id_mask + and x1, x1, {CONST_CORE_ID_MASK} ldr x2, BOOT_CORE_ID // provided by bsp/__board_name__/cpu.rs cmp x1, x2 b.ne .L_parking_loop diff --git a/15_virtual_mem_part3_precomputed_tables/README.md b/15_virtual_mem_part3_precomputed_tables/README.md index 9ec33fc0..5836e12f 100644 --- a/15_virtual_mem_part3_precomputed_tables/README.md +++ b/15_virtual_mem_part3_precomputed_tables/README.md @@ -819,7 +819,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs 1 use core::arch::global_asm; use cortex_a::{asm, registers::*}; use tock_registers::interfaces::Writeable; -@@ -71,9 +72,16 @@ +@@ -75,9 +76,16 @@ /// /// - Exception return from EL2 must must continue execution in EL1 with `kernel_init()`. #[no_mangle] @@ -841,7 +841,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.rs 1 diff -uNr 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.s 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.s --- 14_virtual_mem_part2_mmio_remap/kernel/src/_arch/aarch64/cpu/boot.s +++ 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.s -@@ -56,11 +56,14 @@ +@@ -53,11 +53,14 @@ // Prepare the jump to Rust code. .L_prepare_rust: diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs index 0a606a48..a66c0cb3 100644 --- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs +++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs @@ -17,7 +17,11 @@ use cortex_a::{asm, registers::*}; use tock_registers::interfaces::Writeable; // Assembly counterpart to this file. -global_asm!(include_str!("boot.s")); +global_asm!( + include_str!("boot.s"), + CONST_CURRENTEL_EL2 = const 0x8, + CONST_CORE_ID_MASK = const 0b11 +); //-------------------------------------------------------------------------------------------------- // Private Code diff --git a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.s b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.s index dd2b50b8..dba8c88e 100644 --- a/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.s +++ b/15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.s @@ -18,9 +18,6 @@ add \register, \register, #:lo12:\symbol .endm -.equ _EL2, 0x8 -.equ _core_id_mask, 0b11 - //-------------------------------------------------------------------------------------------------- // Public Code //-------------------------------------------------------------------------------------------------- @@ -32,12 +29,12 @@ _start: // Only proceed if the core executes in EL2. Park it otherwise. mrs x0, CurrentEL - cmp x0, _EL2 + cmp x0, {CONST_CURRENTEL_EL2} b.ne .L_parking_loop // Only proceed on the boot core. Park it otherwise. mrs x1, MPIDR_EL1 - and x1, x1, _core_id_mask + and x1, x1, {CONST_CORE_ID_MASK} ldr x2, BOOT_CORE_ID // provided by bsp/__board_name__/cpu.rs cmp x1, x2 b.ne .L_parking_loop diff --git a/16_virtual_mem_part4_higher_half_kernel/README.md b/16_virtual_mem_part4_higher_half_kernel/README.md index 32259671..a9282d80 100644 --- a/16_virtual_mem_part4_higher_half_kernel/README.md +++ b/16_virtual_mem_part4_higher_half_kernel/README.md @@ -340,7 +340,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/Cargo.toml 16_virtual_m diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.rs --- 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/boot.rs +++ 16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.rs -@@ -30,7 +30,10 @@ +@@ -34,7 +34,10 @@ /// - The `bss` section is not initialized yet. The code must not use or reference it in any way. /// - The HW state of EL1 must be prepared in a sound way. #[inline(always)] @@ -352,7 +352,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/b // Enable timer counter registers for EL1. CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET); -@@ -53,11 +56,11 @@ +@@ -57,11 +60,11 @@ ); // Second, let the link register point to kernel_init(). @@ -366,7 +366,7 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/b } //-------------------------------------------------------------------------------------------------- -@@ -74,14 +77,19 @@ +@@ -78,14 +81,19 @@ #[no_mangle] pub unsafe extern "C" fn _start_rust( phys_kernel_tables_base_addr: u64, @@ -409,10 +409,10 @@ diff -uNr 15_virtual_mem_part3_precomputed_tables/kernel/src/_arch/aarch64/cpu/b + movk \register, #:abs_g0_nc:\symbol +.endm + - .equ _EL2, 0x8 - .equ _core_id_mask, 0b11 - -@@ -59,11 +71,23 @@ + //-------------------------------------------------------------------------------------------------- + // Public Code + //-------------------------------------------------------------------------------------------------- +@@ -56,11 +68,23 @@ // Load the base address of the kernel's translation tables. ldr x0, PHYS_KERNEL_TABLES_BASE_ADDR // provided by bsp/__board_name__/memory/mmu.rs diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.rs b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.rs index 3d01b0dc..293d4608 100644 --- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.rs +++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.rs @@ -17,7 +17,11 @@ use cortex_a::{asm, registers::*}; use tock_registers::interfaces::Writeable; // Assembly counterpart to this file. -global_asm!(include_str!("boot.s")); +global_asm!( + include_str!("boot.s"), + CONST_CURRENTEL_EL2 = const 0x8, + CONST_CORE_ID_MASK = const 0b11 +); //-------------------------------------------------------------------------------------------------- // Private Code diff --git a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.s b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.s index d2c9270d..8c70d035 100644 --- a/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.s +++ b/16_virtual_mem_part4_higher_half_kernel/kernel/src/_arch/aarch64/cpu/boot.s @@ -30,9 +30,6 @@ movk \register, #:abs_g0_nc:\symbol .endm -.equ _EL2, 0x8 -.equ _core_id_mask, 0b11 - //-------------------------------------------------------------------------------------------------- // Public Code //-------------------------------------------------------------------------------------------------- @@ -44,12 +41,12 @@ _start: // Only proceed if the core executes in EL2. Park it otherwise. mrs x0, CurrentEL - cmp x0, _EL2 + cmp x0, {CONST_CURRENTEL_EL2} b.ne .L_parking_loop // Only proceed on the boot core. Park it otherwise. mrs x1, MPIDR_EL1 - and x1, x1, _core_id_mask + and x1, x1, {CONST_CORE_ID_MASK} ldr x2, BOOT_CORE_ID // provided by bsp/__board_name__/cpu.rs cmp x1, x2 b.ne .L_parking_loop diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs index 3d01b0dc..293d4608 100644 --- a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs +++ b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs @@ -17,7 +17,11 @@ use cortex_a::{asm, registers::*}; use tock_registers::interfaces::Writeable; // Assembly counterpart to this file. -global_asm!(include_str!("boot.s")); +global_asm!( + include_str!("boot.s"), + CONST_CURRENTEL_EL2 = const 0x8, + CONST_CORE_ID_MASK = const 0b11 +); //-------------------------------------------------------------------------------------------------- // Private Code diff --git a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.s b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.s index d2c9270d..8c70d035 100644 --- a/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.s +++ b/17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.s @@ -30,9 +30,6 @@ movk \register, #:abs_g0_nc:\symbol .endm -.equ _EL2, 0x8 -.equ _core_id_mask, 0b11 - //-------------------------------------------------------------------------------------------------- // Public Code //-------------------------------------------------------------------------------------------------- @@ -44,12 +41,12 @@ _start: // Only proceed if the core executes in EL2. Park it otherwise. mrs x0, CurrentEL - cmp x0, _EL2 + cmp x0, {CONST_CURRENTEL_EL2} b.ne .L_parking_loop // Only proceed on the boot core. Park it otherwise. mrs x1, MPIDR_EL1 - and x1, x1, _core_id_mask + and x1, x1, {CONST_CORE_ID_MASK} ldr x2, BOOT_CORE_ID // provided by bsp/__board_name__/cpu.rs cmp x1, x2 b.ne .L_parking_loop diff --git a/18_backtrace/README.md b/18_backtrace/README.md index 1ea270d8..c3cc1cc8 100644 --- a/18_backtrace/README.md +++ b/18_backtrace/README.md @@ -552,7 +552,7 @@ diff -uNr 17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs 18_backtrace/ke use cortex_a::{asm, registers::*}; use tock_registers::interfaces::Writeable; -@@ -63,6 +66,18 @@ +@@ -67,6 +70,18 @@ SP_EL1.set(virt_boot_core_stack_end_exclusive_addr); } @@ -571,7 +571,7 @@ diff -uNr 17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs 18_backtrace/ke //-------------------------------------------------------------------------------------------------- // Public Code //-------------------------------------------------------------------------------------------------- -@@ -89,6 +104,9 @@ +@@ -93,6 +108,9 @@ let addr = Address::new(phys_kernel_tables_base_addr as usize); memory::mmu::enable_mmu_and_caching(addr).unwrap(); @@ -582,6 +582,23 @@ diff -uNr 17_kernel_symbols/kernel/src/_arch/aarch64/cpu/boot.rs 18_backtrace/ke // execution of kernel_init() in EL1 from its _virtual address_. asm::eret() +diff -uNr 17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs 18_backtrace/kernel/src/_arch/aarch64/exception.rs +--- 17_kernel_symbols/kernel/src/_arch/aarch64/exception.rs ++++ 18_backtrace/kernel/src/_arch/aarch64/exception.rs +@@ -20,7 +20,11 @@ + }; + + // Assembly counterpart to this file. +-global_asm!(include_str!("exception.s")); ++global_asm!( ++ include_str!("exception.s"), ++ CONST_ESR_EL1_EC_SHIFT = const 26, ++ CONST_ESR_EL1_EC_VALUE_SVC64 = const 0x15 ++); + + //-------------------------------------------------------------------------------------------------- + // Private Definitions + diff -uNr 17_kernel_symbols/kernel/src/_arch/aarch64/exception.s 18_backtrace/kernel/src/_arch/aarch64/exception.s --- 17_kernel_symbols/kernel/src/_arch/aarch64/exception.s +++ 18_backtrace/kernel/src/_arch/aarch64/exception.s @@ -626,8 +643,8 @@ diff -uNr 17_kernel_symbols/kernel/src/_arch/aarch64/exception.s 18_backtrace/ke + // For reference: Search for "preferred exception return address" in the Architecture + // Reference Manual for ARMv8-A. +.if \is_sync == 1 -+ lsr w3, w3, #26 // w3 = ESR_EL1.EC -+ cmp w3, #0x15 // w3 == SVC64 ? ++ lsr w3, w3, {CONST_ESR_EL1_EC_SHIFT} // w3 = ESR_EL1.EC ++ cmp w3, {CONST_ESR_EL1_EC_VALUE_SVC64} // w3 == SVC64 ? + b.eq 1f +.endif + add x1, x1, #4 diff --git a/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.rs b/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.rs index c0bc86be..15ab92b6 100644 --- a/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.rs +++ b/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.rs @@ -20,7 +20,11 @@ use cortex_a::{asm, registers::*}; use tock_registers::interfaces::Writeable; // Assembly counterpart to this file. -global_asm!(include_str!("boot.s")); +global_asm!( + include_str!("boot.s"), + CONST_CURRENTEL_EL2 = const 0x8, + CONST_CORE_ID_MASK = const 0b11 +); //-------------------------------------------------------------------------------------------------- // Private Code diff --git a/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s b/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s index d2c9270d..8c70d035 100644 --- a/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s +++ b/18_backtrace/kernel/src/_arch/aarch64/cpu/boot.s @@ -30,9 +30,6 @@ movk \register, #:abs_g0_nc:\symbol .endm -.equ _EL2, 0x8 -.equ _core_id_mask, 0b11 - //-------------------------------------------------------------------------------------------------- // Public Code //-------------------------------------------------------------------------------------------------- @@ -44,12 +41,12 @@ _start: // Only proceed if the core executes in EL2. Park it otherwise. mrs x0, CurrentEL - cmp x0, _EL2 + cmp x0, {CONST_CURRENTEL_EL2} b.ne .L_parking_loop // Only proceed on the boot core. Park it otherwise. mrs x1, MPIDR_EL1 - and x1, x1, _core_id_mask + and x1, x1, {CONST_CORE_ID_MASK} ldr x2, BOOT_CORE_ID // provided by bsp/__board_name__/cpu.rs cmp x1, x2 b.ne .L_parking_loop diff --git a/18_backtrace/kernel/src/_arch/aarch64/exception.rs b/18_backtrace/kernel/src/_arch/aarch64/exception.rs index 6781758a..30090644 100644 --- a/18_backtrace/kernel/src/_arch/aarch64/exception.rs +++ b/18_backtrace/kernel/src/_arch/aarch64/exception.rs @@ -20,7 +20,11 @@ use tock_registers::{ }; // Assembly counterpart to this file. -global_asm!(include_str!("exception.s")); +global_asm!( + include_str!("exception.s"), + CONST_ESR_EL1_EC_SHIFT = const 26, + CONST_ESR_EL1_EC_VALUE_SVC64 = const 0x15 +); //-------------------------------------------------------------------------------------------------- // Private Definitions diff --git a/18_backtrace/kernel/src/_arch/aarch64/exception.s b/18_backtrace/kernel/src/_arch/aarch64/exception.s index 17acaf59..cdef8c58 100644 --- a/18_backtrace/kernel/src/_arch/aarch64/exception.s +++ b/18_backtrace/kernel/src/_arch/aarch64/exception.s @@ -63,8 +63,8 @@ __vector_\handler: // For reference: Search for "preferred exception return address" in the Architecture // Reference Manual for ARMv8-A. .if \is_sync == 1 - lsr w3, w3, #26 // w3 = ESR_EL1.EC - cmp w3, #0x15 // w3 == SVC64 ? + lsr w3, w3, {CONST_ESR_EL1_EC_SHIFT} // w3 = ESR_EL1.EC + cmp w3, {CONST_ESR_EL1_EC_VALUE_SVC64} // w3 == SVC64 ? b.eq 1f .endif add x1, x1, #4 diff --git a/X1_JTAG_boot/jtag_boot_rpi3.img b/X1_JTAG_boot/jtag_boot_rpi3.img index 584c5a6ef4c2141a22eafa3270aabe16b117ecef..f6afca6ccb677db69ee4628043d1039905542b1a 100755 GIT binary patch delta 14 VcmZ4Cw!&?Lg92mcW=DnROaLps1#|!a delta 14 VcmZ4Cw!&?Lg92mQW=DnROaLpa1#tiX diff --git a/X1_JTAG_boot/jtag_boot_rpi4.img b/X1_JTAG_boot/jtag_boot_rpi4.img index 4ebab5bfd8dac22484d5e9dafb48c6ecc5dd4722..b12e094ded48d939c71c87f3fb3fa66a2c309048 100755 GIT binary patch delta 14 Wcmca$d%