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47 lines
1.9 KiB
Rust
47 lines
1.9 KiB
Rust
// SPDX-License-Identifier: MIT OR Apache-2.0
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//
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// Copyright (c) 2018-2020 Andre Richter <andre.o.richter@gmail.com>
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//! BSP Memory Management.
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pub mod mmu;
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//--------------------------------------------------------------------------------------------------
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// Public Definitions
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//--------------------------------------------------------------------------------------------------
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/// The board's memory map.
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#[rustfmt::skip]
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pub(super) mod map {
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pub const END_INCLUSIVE: usize = 0xFFFF_FFFF;
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pub const GPIO_OFFSET: usize = 0x0020_0000;
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pub const UART_OFFSET: usize = 0x0020_1000;
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/// Physical devices.
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#[cfg(feature = "bsp_rpi3")]
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pub mod mmio {
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use super::*;
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pub const BASE: usize = 0x3F00_0000;
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pub const PERIPHERAL_INTERRUPT_CONTROLLER_BASE: usize = BASE + 0x0000_B200;
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pub const GPIO_BASE: usize = BASE + GPIO_OFFSET;
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pub const PL011_UART_BASE: usize = BASE + UART_OFFSET;
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pub const LOCAL_INTERRUPT_CONTROLLER_BASE: usize = 0x4000_0000;
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pub const END_INCLUSIVE: usize = 0x4000_FFFF;
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}
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/// Physical devices.
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#[cfg(feature = "bsp_rpi4")]
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pub mod mmio {
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use super::*;
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pub const BASE: usize = 0xFE00_0000;
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pub const GPIO_BASE: usize = BASE + GPIO_OFFSET;
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pub const PL011_UART_BASE: usize = BASE + UART_OFFSET;
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pub const GICD_BASE: usize = 0xFF84_1000;
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pub const GICC_BASE: usize = 0xFF84_2000;
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pub const END_INCLUSIVE: usize = 0xFF84_FFFF;
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}
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}
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