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74 lines
2.5 KiB
Rust
74 lines
2.5 KiB
Rust
/*
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* MIT License
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*
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* Copyright (c) 2018 Andre Richter <andre.o.richter@gmail.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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use super::MMIO_BASE;
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use register::{mmio::ReadWrite, register_bitfields};
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// Descriptions taken from
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// https://github.com/raspberrypi/documentation/files/1888662/BCM2837-ARM-Peripherals.-.Revised.-.V2-1.pdf
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register_bitfields! {
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u32,
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/// GPIO Function Select 1
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GPFSEL1 [
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/// Pin 15
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FSEL15 OFFSET(15) NUMBITS(3) [
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Input = 0b000,
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Output = 0b001,
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RXD1 = 0b010 // Mini UART - Alternate function 5
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],
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/// Pin 14
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FSEL14 OFFSET(12) NUMBITS(3) [
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Input = 0b000,
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Output = 0b001,
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TXD1 = 0b010 // Mini UART - Alternate function 5
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]
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],
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/// GPIO Pull-up/down Clock Register 0
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GPPUDCLK0 [
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/// Pin 15
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PUDCLK15 OFFSET(15) NUMBITS(1) [
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NoEffect = 0,
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AssertClock = 1
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],
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/// Pin 14
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PUDCLK14 OFFSET(14) NUMBITS(1) [
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NoEffect = 0,
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AssertClock = 1
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]
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]
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}
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pub const GPFSEL1: *const ReadWrite<u32, GPFSEL1::Register> =
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(MMIO_BASE + 0x0020_0004) as *const ReadWrite<u32, GPFSEL1::Register>;
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pub const GPPUD: *const ReadWrite<u32> = (MMIO_BASE + 0x0020_0094) as *const ReadWrite<u32>;
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pub const GPPUDCLK0: *const ReadWrite<u32, GPPUDCLK0::Register> =
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(MMIO_BASE + 0x0020_0098) as *const ReadWrite<u32, GPPUDCLK0::Register>;
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