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191 lines
5.8 KiB
ArmAsm
191 lines
5.8 KiB
ArmAsm
// SPDX-License-Identifier: MIT OR Apache-2.0
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//
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// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
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//--------------------------------------------------------------------------------------------------
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// Definitions
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//--------------------------------------------------------------------------------------------------
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/// Call the function provided by parameter `\handler` after saving the exception context. Provide
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/// the context as the first parameter to '\handler'.
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.macro CALL_WITH_CONTEXT handler is_lower_el is_sync
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__vector_\handler:
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// Make room on the stack for the exception context.
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sub sp, sp, #16 * 18
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// Store all general purpose registers on the stack.
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stp x0, x1, [sp, #16 * 0]
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stp x2, x3, [sp, #16 * 1]
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stp x4, x5, [sp, #16 * 2]
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stp x6, x7, [sp, #16 * 3]
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stp x8, x9, [sp, #16 * 4]
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stp x10, x11, [sp, #16 * 5]
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stp x12, x13, [sp, #16 * 6]
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stp x14, x15, [sp, #16 * 7]
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stp x16, x17, [sp, #16 * 8]
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stp x18, x19, [sp, #16 * 9]
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stp x20, x21, [sp, #16 * 10]
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stp x22, x23, [sp, #16 * 11]
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stp x24, x25, [sp, #16 * 12]
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stp x26, x27, [sp, #16 * 13]
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stp x28, x29, [sp, #16 * 14]
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// Add the exception link register (ELR_EL1), saved program status (SPSR_EL1) and exception
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// syndrome register (ESR_EL1).
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mrs x1, ELR_EL1
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mrs x2, SPSR_EL1
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mrs x3, ESR_EL1
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stp lr, x1, [sp, #16 * 15]
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stp x2, x3, [sp, #16 * 16]
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// Build a stack frame for backtracing.
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.if \is_lower_el == 1
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// If we came from a lower EL, make it a root frame (by storing zero) so that the kernel
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// does not attempt to trace into userspace.
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stp xzr, xzr, [sp, #16 * 17]
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.else
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// For normal branches, the link address points to the instruction to be executed _after_
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// returning from a branch. In a backtrace, we want to show the instruction that caused the
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// branch, though. That is why code in backtrace.rs subtracts 4 (length of one instruction)
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// from the link address.
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//
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// Here we have a special case, though, because ELR_EL1 is used instead of LR to build the
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// stack frame, so that it becomes possible to trace beyond an exception. Hence, it must be
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// considered that semantics for ELR_EL1 differ from case to case.
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//
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// Unless an "exception generating instruction" was executed, ELR_EL1 already points to the
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// the correct instruction, and hence the subtraction by 4 in backtrace.rs would yield wrong
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// results. To cover for this, 4 is added to ELR_EL1 below unless the cause of exception was
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// an SVC instruction. BRK and HLT are "exception generating instructions" as well, but they
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// are not expected and therefore left out for now.
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//
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// For reference: Search for "preferred exception return address" in the Architecture
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// Reference Manual for ARMv8-A.
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.if \is_sync == 1
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lsr w3, w3, #26 // w3 = ESR_EL1.EC
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cmp w3, #0x15 // w3 == SVC64 ?
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b.eq 1f
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.endif
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add x1, x1, #4
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1:
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stp x29, x1, [sp, #16 * 17]
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.endif
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// Set the frame pointer to the stack frame record.
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add x29, sp, #16 * 17
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// x0 is the first argument for the function called through `\handler`.
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mov x0, sp
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// Call `\handler`.
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bl \handler
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// After returning from exception handling code, replay the saved context and return via
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// `eret`.
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b __exception_restore_context
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.size __vector_\handler, . - __vector_\handler
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.type __vector_\handler, function
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.endm
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.macro FIQ_SUSPEND
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1: wfe
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b 1b
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.endm
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//--------------------------------------------------------------------------------------------------
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// Private Code
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//--------------------------------------------------------------------------------------------------
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.section .text
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//------------------------------------------------------------------------------
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// The exception vector table.
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//------------------------------------------------------------------------------
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// Align by 2^11 bytes, as demanded by ARMv8-A. Same as ALIGN(2048) in an ld script.
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.align 11
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// Export a symbol for the Rust code to use.
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__exception_vector_start:
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// Current exception level with SP_EL0.
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//
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// .org sets the offset relative to section start.
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//
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// # Safety
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//
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// - It must be ensured that `CALL_WITH_CONTEXT` <= 0x80 bytes.
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.org 0x000
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CALL_WITH_CONTEXT current_el0_synchronous, 0, 1
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.org 0x080
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CALL_WITH_CONTEXT current_el0_irq, 0, 0
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.org 0x100
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FIQ_SUSPEND
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.org 0x180
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CALL_WITH_CONTEXT current_el0_serror, 0, 0
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// Current exception level with SP_ELx, x > 0.
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.org 0x200
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CALL_WITH_CONTEXT current_elx_synchronous, 0, 1
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.org 0x280
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CALL_WITH_CONTEXT current_elx_irq, 0, 0
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.org 0x300
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FIQ_SUSPEND
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.org 0x380
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CALL_WITH_CONTEXT current_elx_serror, 0, 0
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// Lower exception level, AArch64
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.org 0x400
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CALL_WITH_CONTEXT lower_aarch64_synchronous, 1, 1
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.org 0x480
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CALL_WITH_CONTEXT lower_aarch64_irq, 1, 0
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.org 0x500
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FIQ_SUSPEND
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.org 0x580
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CALL_WITH_CONTEXT lower_aarch64_serror, 1, 0
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// Lower exception level, AArch32
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.org 0x600
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CALL_WITH_CONTEXT lower_aarch32_synchronous, 1, 0
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.org 0x680
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CALL_WITH_CONTEXT lower_aarch32_irq, 1, 0
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.org 0x700
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FIQ_SUSPEND
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.org 0x780
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CALL_WITH_CONTEXT lower_aarch32_serror, 1, 0
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.org 0x800
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//------------------------------------------------------------------------------
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// fn __exception_restore_context()
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//------------------------------------------------------------------------------
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__exception_restore_context:
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ldr w19, [sp, #16 * 16]
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ldp lr, x20, [sp, #16 * 15]
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msr SPSR_EL1, x19
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msr ELR_EL1, x20
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ldp x0, x1, [sp, #16 * 0]
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ldp x2, x3, [sp, #16 * 1]
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ldp x4, x5, [sp, #16 * 2]
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ldp x6, x7, [sp, #16 * 3]
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ldp x8, x9, [sp, #16 * 4]
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ldp x10, x11, [sp, #16 * 5]
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ldp x12, x13, [sp, #16 * 6]
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ldp x14, x15, [sp, #16 * 7]
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ldp x16, x17, [sp, #16 * 8]
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ldp x18, x19, [sp, #16 * 9]
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ldp x20, x21, [sp, #16 * 10]
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ldp x22, x23, [sp, #16 * 11]
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ldp x24, x25, [sp, #16 * 12]
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ldp x26, x27, [sp, #16 * 13]
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ldp x28, x29, [sp, #16 * 14]
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add sp, sp, #16 * 18
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eret
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.size __exception_restore_context, . - __exception_restore_context
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.type __exception_restore_context, function
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