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134 lines
3.8 KiB
Rust
134 lines
3.8 KiB
Rust
// SPDX-License-Identifier: MIT
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//
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// Copyright (c) 2018-2019 Andre Richter <andre.o.richter@gmail.com>
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//! AArch64.
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mod exception;
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pub mod sync;
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mod time;
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use crate::{bsp, interface};
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use cortex_a::{asm, regs::*};
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/// The entry of the `kernel` binary.
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///
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/// The function must be named `_start`, because the linker is looking for this exact name.
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///
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/// # Safety
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///
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/// - Linker script must ensure to place this function at `0x80_000`.
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#[no_mangle]
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pub unsafe extern "C" fn _start() -> ! {
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const CORE_MASK: u64 = 0x3;
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// Expect the boot core to start in EL2.
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if (bsp::BOOT_CORE_ID == MPIDR_EL1.get() & CORE_MASK)
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&& (CurrentEL.get() == CurrentEL::EL::EL2.value)
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{
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el2_to_el1_transition()
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} else {
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// If not core0, infinitely wait for events.
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wait_forever()
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}
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}
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/// Transition from EL2 to EL1.
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#[inline(always)]
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fn el2_to_el1_transition() -> ! {
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// Enable timer counter registers for EL1.
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CNTHCTL_EL2.write(CNTHCTL_EL2::EL1PCEN::SET + CNTHCTL_EL2::EL1PCTEN::SET);
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// No offset for reading the counters.
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CNTVOFF_EL2.set(0);
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// Set EL1 execution state to AArch64.
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HCR_EL2.write(HCR_EL2::RW::EL1IsAarch64);
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// Set up a simulated exception return.
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//
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// First, fake a saved program status, where all interrupts were masked and SP_EL1 was used as a
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// stack pointer.
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SPSR_EL2.write(
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SPSR_EL2::D::Masked
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+ SPSR_EL2::A::Masked
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+ SPSR_EL2::I::Masked
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+ SPSR_EL2::F::Masked
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+ SPSR_EL2::M::EL1h,
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);
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// Second, let the link register point to init().
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ELR_EL2.set(crate::runtime_init::init as *const () as u64);
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// Set up SP_EL1 (stack pointer), which will be used by EL1 once we "return" to it.
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SP_EL1.set(bsp::BOOT_CORE_STACK_START);
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// Use `eret` to "return" to EL1. This will result in execution of `reset()` in EL1.
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asm::eret()
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}
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//--------------------------------------------------------------------------------------------------
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// Global instances
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//--------------------------------------------------------------------------------------------------
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static TIMER: time::Timer = time::Timer;
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//--------------------------------------------------------------------------------------------------
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// Implementation of the kernel's architecture abstraction code
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//--------------------------------------------------------------------------------------------------
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pub use asm::nop;
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/// Spin for `n` cycles.
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pub fn spin_for_cycles(n: usize) {
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for _ in 0..n {
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asm::nop();
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}
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}
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/// Return a reference to a `interface::time::TimeKeeper` implementation.
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pub fn timer() -> &'static impl interface::time::Timer {
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&TIMER
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}
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/// Pause execution on the calling CPU core.
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#[inline(always)]
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pub fn wait_forever() -> ! {
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loop {
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asm::wfe()
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}
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}
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/// Information about the HW state.
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pub mod state {
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use cortex_a::regs::*;
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/// The current privilege level.
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pub fn current_privilege_level() -> &'static str {
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let el = CurrentEL.read_as_enum(CurrentEL::EL);
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match el {
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Some(CurrentEL::EL::Value::EL2) => "EL2",
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Some(CurrentEL::EL::Value::EL1) => "EL1",
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_ => "Unknown",
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}
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}
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#[rustfmt::skip]
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pub fn print_exception_state() {
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use super::{
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exception,
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exception::{Debug, SError, FIQ, IRQ},
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};
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use crate::println;
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let to_mask_str = |x: bool| -> &'static str {
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if x { "Masked" } else { "Unmasked" }
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};
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println!(" Debug: {}", to_mask_str(exception::is_masked::<Debug>()));
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println!(" SError: {}", to_mask_str(exception::is_masked::<SError>()));
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println!(" IRQ: {}", to_mask_str(exception::is_masked::<IRQ>()));
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println!(" FIQ: {}", to_mask_str(exception::is_masked::<FIQ>()));
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}
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}
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