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74 lines
2.0 KiB
ArmAsm
74 lines
2.0 KiB
ArmAsm
/*
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* Copyright (C) 2018 bzt (bztsrc@github)
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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*/
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.section ".text.boot"
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.global _start
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_start:
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// read cpu id, stop slave cores
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mrs x1, mpidr_el1
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and x1, x1, #3
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cbz x1, 2f
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// cpu id > 0, stop
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1: wfe
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b 1b
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2: // cpu id == 0
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// set stack before our code
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ldr x1, =_start
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// set up EL1
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mrs x0, CurrentEL
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cmp x0, #4
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beq 5f
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msr sp_el1, x1
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// enable CNTP for EL1
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mrs x0, cnthctl_el2
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orr x0, x0, #3
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msr cnthctl_el2, x0
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msr cntvoff_el2, xzr
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// change execution level to EL1
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mov x2, #0x3c4
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msr spsr_el2, x2
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adr x2, 5f
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msr elr_el2, x2
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eret
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5: mov sp, x1
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// clear bss
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ldr x1, =__bss_start
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ldr w2, =__bss_size
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3: cbz w2, 4f
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str xzr, [x1], #8
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sub w2, w2, #1
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cbnz w2, 3b
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// jump to C code, should not return
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4: bl main
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// for failsafe, halt this core too
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b 1b
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