rubocop: Fix some errors

pull/112/head
Andre Richter 3 years ago
parent d6e4a03189
commit 37cb58a944
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GPG Key ID: 2116C1AB102F615E

@ -16,9 +16,6 @@ Layout/IndentationWidth:
Layout/LineLength: Layout/LineLength:
Max: 100 Max: 100
Lint/DeprecatedConstants:
Enabled: false
Metrics/ClassLength: Metrics/ClassLength:
Enabled: false Enabled: false

@ -1562,7 +1562,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/tests/02_exception_sync_page_fault.rs
diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
--- 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb --- 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb
+++ 15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb +++ 15_virtual_mem_part3_precomputed_tables/translation_table_tool/arch.rb
@@ -0,0 +1,323 @@ @@ -0,0 +1,335 @@
+# frozen_string_literal: true +# frozen_string_literal: true
+ +
+# SPDX-License-Identifier: MIT OR Apache-2.0 +# SPDX-License-Identifier: MIT OR Apache-2.0
@ -1617,9 +1617,6 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virt
+# Arch:: +# Arch::
+#--------------------------------------------------------------------------------------------------- +#---------------------------------------------------------------------------------------------------
+module Arch +module Arch
+FALSE = 0b0
+TRUE = 0b1
+
+#--------------------------------------------------------------------------------------------------- +#---------------------------------------------------------------------------------------------------
+# Arch::ARMv8 +# Arch::ARMv8
+#--------------------------------------------------------------------------------------------------- +#---------------------------------------------------------------------------------------------------
@ -1642,6 +1639,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virt
+ module Valid + module Valid
+ OFFSET = 0 + OFFSET = 0
+ NUMBITS = 1 + NUMBITS = 1
+
+ FALSE = 0
+ TRUE = 1
+ end + end
+ +
+ attr_bitfield(:__next_level_table_addr, NextLevelTableAddr::OFFSET, NextLevelTableAddr::NUMBITS) + attr_bitfield(:__next_level_table_addr, NextLevelTableAddr::OFFSET, NextLevelTableAddr::NUMBITS)
@ -1662,11 +1662,17 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virt
+ module UXN + module UXN
+ OFFSET = 54 + OFFSET = 54
+ NUMBITS = 1 + NUMBITS = 1
+
+ FALSE = 0
+ TRUE = 1
+ end + end
+ +
+ module PXN + module PXN
+ OFFSET = 53 + OFFSET = 53
+ NUMBITS = 1 + NUMBITS = 1
+
+ FALSE = 0
+ TRUE = 1
+ end + end
+ +
+ module OutputAddr + module OutputAddr
@ -1677,6 +1683,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virt
+ module AF + module AF
+ OFFSET = 10 + OFFSET = 10
+ NUMBITS = 1 + NUMBITS = 1
+
+ FALSE = 0
+ TRUE = 1
+ end + end
+ +
+ module SH + module SH
@ -1710,6 +1719,9 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virt
+ module Valid + module Valid
+ OFFSET = 0 + OFFSET = 0
+ NUMBITS = 1 + NUMBITS = 1
+
+ FALSE = 0
+ TRUE = 1
+ end + end
+ +
+ attr_bitfield(:uxn, UXN::OFFSET, UXN::NUMBITS) + attr_bitfield(:uxn, UXN::OFFSET, UXN::NUMBITS)
@ -1821,7 +1833,7 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virt
+ @lvl2.each_with_index do |descriptor, i| + @lvl2.each_with_index do |descriptor, i|
+ descriptor.next_level_table_addr = @lvl3[i].phys_start_addr + descriptor.next_level_table_addr = @lvl3[i].phys_start_addr
+ descriptor.type = Stage1TableDescriptor::Type::TABLE + descriptor.type = Stage1TableDescriptor::Type::TABLE
+ descriptor.valid = TRUE + descriptor.valid = Stage1TableDescriptor::Valid::TRUE
+ end + end
+ end + end
+ +
@ -1864,22 +1876,22 @@ diff -uNr 14_virtual_mem_part2_mmio_remap/translation_table_tool/arch.rb 15_virt
+ +
+ desc.pxn = case attributes.execute_never + desc.pxn = case attributes.execute_never
+ when :XN + when :XN
+ TRUE + Stage1PageDescriptor::PXN::TRUE
+ when :X + when :X
+ FALSE + Stage1PageDescriptor::PXN::FALSE
+ else + else
+ raise 'Invalid input' + raise 'Invalid input'
+ end + end
+ +
+ desc.uxn = TRUE + desc.uxn = Stage1PageDescriptor::UXN::TRUE
+ end + end
+ # rubocop:enable Metrics/MethodLength + # rubocop:enable Metrics/MethodLength
+ +
+ def set_lvl3_entry(desc, output_addr, attributes) + def set_lvl3_entry(desc, output_addr, attributes)
+ desc.output_addr = output_addr + desc.output_addr = output_addr
+ desc.af = TRUE + desc.af = Stage1PageDescriptor::AF::TRUE
+ desc.type = Stage1PageDescriptor::Type::PAGE + desc.type = Stage1PageDescriptor::Type::PAGE
+ desc.valid = TRUE + desc.valid = Stage1PageDescriptor::Valid::TRUE
+ +
+ set_attributes(desc, attributes) + set_attributes(desc, attributes)
+ end + end

@ -52,9 +52,6 @@ end
# Arch:: # Arch::
#--------------------------------------------------------------------------------------------------- #---------------------------------------------------------------------------------------------------
module Arch module Arch
FALSE = 0b0
TRUE = 0b1
#--------------------------------------------------------------------------------------------------- #---------------------------------------------------------------------------------------------------
# Arch::ARMv8 # Arch::ARMv8
#--------------------------------------------------------------------------------------------------- #---------------------------------------------------------------------------------------------------
@ -77,6 +74,9 @@ class Stage1TableDescriptor < BitField
module Valid module Valid
OFFSET = 0 OFFSET = 0
NUMBITS = 1 NUMBITS = 1
FALSE = 0
TRUE = 1
end end
attr_bitfield(:__next_level_table_addr, NextLevelTableAddr::OFFSET, NextLevelTableAddr::NUMBITS) attr_bitfield(:__next_level_table_addr, NextLevelTableAddr::OFFSET, NextLevelTableAddr::NUMBITS)
@ -97,11 +97,17 @@ class Stage1PageDescriptor < BitField
module UXN module UXN
OFFSET = 54 OFFSET = 54
NUMBITS = 1 NUMBITS = 1
FALSE = 0
TRUE = 1
end end
module PXN module PXN
OFFSET = 53 OFFSET = 53
NUMBITS = 1 NUMBITS = 1
FALSE = 0
TRUE = 1
end end
module OutputAddr module OutputAddr
@ -112,6 +118,9 @@ class Stage1PageDescriptor < BitField
module AF module AF
OFFSET = 10 OFFSET = 10
NUMBITS = 1 NUMBITS = 1
FALSE = 0
TRUE = 1
end end
module SH module SH
@ -145,6 +154,9 @@ class Stage1PageDescriptor < BitField
module Valid module Valid
OFFSET = 0 OFFSET = 0
NUMBITS = 1 NUMBITS = 1
FALSE = 0
TRUE = 1
end end
attr_bitfield(:uxn, UXN::OFFSET, UXN::NUMBITS) attr_bitfield(:uxn, UXN::OFFSET, UXN::NUMBITS)
@ -256,7 +268,7 @@ class TranslationTable
@lvl2.each_with_index do |descriptor, i| @lvl2.each_with_index do |descriptor, i|
descriptor.next_level_table_addr = @lvl3[i].phys_start_addr descriptor.next_level_table_addr = @lvl3[i].phys_start_addr
descriptor.type = Stage1TableDescriptor::Type::TABLE descriptor.type = Stage1TableDescriptor::Type::TABLE
descriptor.valid = TRUE descriptor.valid = Stage1TableDescriptor::Valid::TRUE
end end
end end
@ -299,22 +311,22 @@ class TranslationTable
desc.pxn = case attributes.execute_never desc.pxn = case attributes.execute_never
when :XN when :XN
TRUE Stage1PageDescriptor::PXN::TRUE
when :X when :X
FALSE Stage1PageDescriptor::PXN::FALSE
else else
raise 'Invalid input' raise 'Invalid input'
end end
desc.uxn = TRUE desc.uxn = Stage1PageDescriptor::UXN::TRUE
end end
# rubocop:enable Metrics/MethodLength # rubocop:enable Metrics/MethodLength
def set_lvl3_entry(desc, output_addr, attributes) def set_lvl3_entry(desc, output_addr, attributes)
desc.output_addr = output_addr desc.output_addr = output_addr
desc.af = TRUE desc.af = Stage1PageDescriptor::AF::TRUE
desc.type = Stage1PageDescriptor::Type::PAGE desc.type = Stage1PageDescriptor::Type::PAGE
desc.valid = TRUE desc.valid = Stage1PageDescriptor::Valid::TRUE
set_attributes(desc, attributes) set_attributes(desc, attributes)
end end

@ -52,9 +52,6 @@ end
# Arch:: # Arch::
#--------------------------------------------------------------------------------------------------- #---------------------------------------------------------------------------------------------------
module Arch module Arch
FALSE = 0b0
TRUE = 0b1
#--------------------------------------------------------------------------------------------------- #---------------------------------------------------------------------------------------------------
# Arch::ARMv8 # Arch::ARMv8
#--------------------------------------------------------------------------------------------------- #---------------------------------------------------------------------------------------------------
@ -77,6 +74,9 @@ class Stage1TableDescriptor < BitField
module Valid module Valid
OFFSET = 0 OFFSET = 0
NUMBITS = 1 NUMBITS = 1
FALSE = 0
TRUE = 1
end end
attr_bitfield(:__next_level_table_addr, NextLevelTableAddr::OFFSET, NextLevelTableAddr::NUMBITS) attr_bitfield(:__next_level_table_addr, NextLevelTableAddr::OFFSET, NextLevelTableAddr::NUMBITS)
@ -97,11 +97,17 @@ class Stage1PageDescriptor < BitField
module UXN module UXN
OFFSET = 54 OFFSET = 54
NUMBITS = 1 NUMBITS = 1
FALSE = 0
TRUE = 1
end end
module PXN module PXN
OFFSET = 53 OFFSET = 53
NUMBITS = 1 NUMBITS = 1
FALSE = 0
TRUE = 1
end end
module OutputAddr module OutputAddr
@ -112,6 +118,9 @@ class Stage1PageDescriptor < BitField
module AF module AF
OFFSET = 10 OFFSET = 10
NUMBITS = 1 NUMBITS = 1
FALSE = 0
TRUE = 1
end end
module SH module SH
@ -145,6 +154,9 @@ class Stage1PageDescriptor < BitField
module Valid module Valid
OFFSET = 0 OFFSET = 0
NUMBITS = 1 NUMBITS = 1
FALSE = 0
TRUE = 1
end end
attr_bitfield(:uxn, UXN::OFFSET, UXN::NUMBITS) attr_bitfield(:uxn, UXN::OFFSET, UXN::NUMBITS)
@ -256,7 +268,7 @@ class TranslationTable
@lvl2.each_with_index do |descriptor, i| @lvl2.each_with_index do |descriptor, i|
descriptor.next_level_table_addr = @lvl3[i].phys_start_addr descriptor.next_level_table_addr = @lvl3[i].phys_start_addr
descriptor.type = Stage1TableDescriptor::Type::TABLE descriptor.type = Stage1TableDescriptor::Type::TABLE
descriptor.valid = TRUE descriptor.valid = Stage1TableDescriptor::Valid::TRUE
end end
end end
@ -299,22 +311,22 @@ class TranslationTable
desc.pxn = case attributes.execute_never desc.pxn = case attributes.execute_never
when :XN when :XN
TRUE Stage1PageDescriptor::PXN::TRUE
when :X when :X
FALSE Stage1PageDescriptor::PXN::FALSE
else else
raise 'Invalid input' raise 'Invalid input'
end end
desc.uxn = TRUE desc.uxn = Stage1PageDescriptor::UXN::TRUE
end end
# rubocop:enable Metrics/MethodLength # rubocop:enable Metrics/MethodLength
def set_lvl3_entry(desc, output_addr, attributes) def set_lvl3_entry(desc, output_addr, attributes)
desc.output_addr = output_addr desc.output_addr = output_addr
desc.af = TRUE desc.af = Stage1PageDescriptor::AF::TRUE
desc.type = Stage1PageDescriptor::Type::PAGE desc.type = Stage1PageDescriptor::Type::PAGE
desc.valid = TRUE desc.valid = Stage1PageDescriptor::Valid::TRUE
set_attributes(desc, attributes) set_attributes(desc, attributes)
end end

@ -166,6 +166,8 @@ class DevTool
def rubocop def rubocop
puts 'Rubocop'.light_blue puts 'Rubocop'.light_blue
system('which bundle')
system('bundle --version')
exit(1) unless system('bundle exec rubocop') exit(1) unless system('bundle exec rubocop')
end end
@ -180,8 +182,6 @@ class DevTool
diff diff
clean clean
make('rpi4')
make('rpi3')
make_xtra make_xtra
test_unit test_unit
test_integration test_integration

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