State: Encapsulate state check into member function

pull/84/head
Andre Richter 4 years ago
parent dd296f7eca
commit af0214f0f6
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GPG Key ID: 2116C1AB102F615E

@ -1163,7 +1163,7 @@ diff -uNr 13_integrated_testing/src/bsp/device_driver/arm/gicv2/gicd.rs 14_excep
+ /// Route all SPIs to the boot core and enable the distributor. + /// Route all SPIs to the boot core and enable the distributor.
+ pub fn boot_core_init(&self) { + pub fn boot_core_init(&self) {
+ assert!( + assert!(
+ state::state_manager().state() == state::State::Init, + state::state_manager().is_init(),
+ "Only allowed during kernel init phase" + "Only allowed during kernel init phase"
+ ); + );
+ +
@ -2507,7 +2507,7 @@ diff -uNr 13_integrated_testing/src/main.rs 14_exceptions_part2_peripheral_IRQs/
diff -uNr 13_integrated_testing/src/state.rs 14_exceptions_part2_peripheral_IRQs/src/state.rs diff -uNr 13_integrated_testing/src/state.rs 14_exceptions_part2_peripheral_IRQs/src/state.rs
--- 13_integrated_testing/src/state.rs --- 13_integrated_testing/src/state.rs
+++ 14_exceptions_part2_peripheral_IRQs/src/state.rs +++ 14_exceptions_part2_peripheral_IRQs/src/state.rs
@@ -0,0 +1,83 @@ @@ -0,0 +1,92 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0 +// SPDX-License-Identifier: MIT OR Apache-2.0
+// +//
+// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com> +// Copyright (c) 2020 Andre Richter <andre.o.richter@gmail.com>
@ -2517,12 +2517,12 @@ diff -uNr 13_integrated_testing/src/state.rs 14_exceptions_part2_peripheral_IRQs
+use core::sync::atomic::{AtomicU8, Ordering}; +use core::sync::atomic::{AtomicU8, Ordering};
+ +
+//-------------------------------------------------------------------------------------------------- +//--------------------------------------------------------------------------------------------------
+// Public Definitions +// Private Definitions
+//-------------------------------------------------------------------------------------------------- +//--------------------------------------------------------------------------------------------------
+ +
+/// Different stages in the kernel execution. +/// Different stages in the kernel execution.
+#[derive(Copy, Clone, Eq, PartialEq)] +#[derive(Copy, Clone, Eq, PartialEq)]
+pub enum State { +enum State {
+ /// The kernel starts booting in this state. + /// The kernel starts booting in this state.
+ Init, + Init,
+ +
@ -2535,6 +2535,10 @@ diff -uNr 13_integrated_testing/src/state.rs 14_exceptions_part2_peripheral_IRQs
+ MultiCoreMain, + MultiCoreMain,
+} +}
+ +
+//--------------------------------------------------------------------------------------------------
+// Public Definitions
+//--------------------------------------------------------------------------------------------------
+
+/// Maintains the kernel state and state transitions. +/// Maintains the kernel state and state transitions.
+pub struct StateManager(AtomicU8); +pub struct StateManager(AtomicU8);
+ +
@ -2564,7 +2568,7 @@ diff -uNr 13_integrated_testing/src/state.rs 14_exceptions_part2_peripheral_IRQs
+ } + }
+ +
+ /// Return the current state. + /// Return the current state.
+ pub fn state(&self) -> State { + fn state(&self) -> State {
+ let state = self.0.load(Ordering::Acquire); + let state = self.0.load(Ordering::Acquire);
+ +
+ match state { + match state {
@ -2575,6 +2579,11 @@ diff -uNr 13_integrated_testing/src/state.rs 14_exceptions_part2_peripheral_IRQs
+ } + }
+ } + }
+ +
+ /// Return if the kernel is still in an init state.
+ pub fn is_init(&self) -> bool {
+ self.state() == State::Init
+ }
+
+ /// Transition from Init to SingleCoreMain. + /// Transition from Init to SingleCoreMain.
+ pub fn transition_to_single_core_main(&self) { + pub fn transition_to_single_core_main(&self) {
+ if self + if self
@ -2686,7 +2695,7 @@ diff -uNr 13_integrated_testing/src/synchronization.rs 14_exceptions_part2_perip
+ +
+ fn write<R>(&mut self, f: impl FnOnce(&mut Self::Data) -> R) -> R { + fn write<R>(&mut self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
+ assert!( + assert!(
+ state::state_manager().state() == state::State::Init, + state::state_manager().is_init(),
+ "InitStateLock::write called after kernel init phase" + "InitStateLock::write called after kernel init phase"
+ ); + );
+ assert!( + assert!(

@ -144,7 +144,7 @@ impl GICD {
/// Route all SPIs to the boot core and enable the distributor. /// Route all SPIs to the boot core and enable the distributor.
pub fn boot_core_init(&self) { pub fn boot_core_init(&self) {
assert!( assert!(
state::state_manager().state() == state::State::Init, state::state_manager().is_init(),
"Only allowed during kernel init phase" "Only allowed during kernel init phase"
); );

@ -7,12 +7,12 @@
use core::sync::atomic::{AtomicU8, Ordering}; use core::sync::atomic::{AtomicU8, Ordering};
//-------------------------------------------------------------------------------------------------- //--------------------------------------------------------------------------------------------------
// Public Definitions // Private Definitions
//-------------------------------------------------------------------------------------------------- //--------------------------------------------------------------------------------------------------
/// Different stages in the kernel execution. /// Different stages in the kernel execution.
#[derive(Copy, Clone, Eq, PartialEq)] #[derive(Copy, Clone, Eq, PartialEq)]
pub enum State { enum State {
/// The kernel starts booting in this state. /// The kernel starts booting in this state.
Init, Init,
@ -25,6 +25,10 @@ pub enum State {
MultiCoreMain, MultiCoreMain,
} }
//--------------------------------------------------------------------------------------------------
// Public Definitions
//--------------------------------------------------------------------------------------------------
/// Maintains the kernel state and state transitions. /// Maintains the kernel state and state transitions.
pub struct StateManager(AtomicU8); pub struct StateManager(AtomicU8);
@ -54,7 +58,7 @@ impl StateManager {
} }
/// Return the current state. /// Return the current state.
pub fn state(&self) -> State { fn state(&self) -> State {
let state = self.0.load(Ordering::Acquire); let state = self.0.load(Ordering::Acquire);
match state { match state {
@ -65,6 +69,11 @@ impl StateManager {
} }
} }
/// Return if the kernel is still in an init state.
pub fn is_init(&self) -> bool {
self.state() == State::Init
}
/// Transition from Init to SingleCoreMain. /// Transition from Init to SingleCoreMain.
pub fn transition_to_single_core_main(&self) { pub fn transition_to_single_core_main(&self) {
if self if self

@ -130,7 +130,7 @@ impl<T> interface::ReadWriteEx for &InitStateLock<T> {
fn write<R>(&mut self, f: impl FnOnce(&mut Self::Data) -> R) -> R { fn write<R>(&mut self, f: impl FnOnce(&mut Self::Data) -> R) -> R {
assert!( assert!(
state::state_manager().state() == state::State::Init, state::state_manager().is_init(),
"InitStateLock::write called after kernel init phase" "InitStateLock::write called after kernel init phase"
); );
assert!( assert!(

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