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122 lines
3.9 KiB
Rust
122 lines
3.9 KiB
Rust
// SPDX-License-Identifier: MIT OR Apache-2.0
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//
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// Copyright (c) 2018-2022 Andre Richter <andre.o.richter@gmail.com>
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//! Architectural timer primitives.
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//!
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//! # Orientation
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//!
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//! Since arch modules are imported into generic modules using the path attribute, the path of this
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//! file is:
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//!
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//! crate::time::arch_time
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use crate::{time, warn};
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use core::time::Duration;
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use cortex_a::{asm::barrier, registers::*};
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use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
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//--------------------------------------------------------------------------------------------------
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// Private Definitions
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//--------------------------------------------------------------------------------------------------
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const NS_PER_S: u64 = 1_000_000_000;
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/// ARMv8 Generic Timer.
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struct GenericTimer;
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//--------------------------------------------------------------------------------------------------
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// Global instances
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//--------------------------------------------------------------------------------------------------
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static TIME_MANAGER: GenericTimer = GenericTimer;
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//--------------------------------------------------------------------------------------------------
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// Private Code
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//--------------------------------------------------------------------------------------------------
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impl GenericTimer {
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#[inline(always)]
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fn read_cntpct(&self) -> u64 {
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// Prevent that the counter is read ahead of time due to out-of-order execution.
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unsafe { barrier::isb(barrier::SY) };
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CNTPCT_EL0.get()
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}
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}
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//--------------------------------------------------------------------------------------------------
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// Public Code
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//--------------------------------------------------------------------------------------------------
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/// Return a reference to the time manager.
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pub fn time_manager() -> &'static impl time::interface::TimeManager {
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&TIME_MANAGER
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}
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//------------------------------------------------------------------------------
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// OS Interface Code
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//------------------------------------------------------------------------------
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impl time::interface::TimeManager for GenericTimer {
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fn resolution(&self) -> Duration {
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Duration::from_nanos(NS_PER_S / (CNTFRQ_EL0.get() as u64))
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}
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fn uptime(&self) -> Duration {
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let current_count: u64 = self.read_cntpct() * NS_PER_S;
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let frq: u64 = CNTFRQ_EL0.get() as u64;
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Duration::from_nanos(current_count / frq)
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}
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fn spin_for(&self, duration: Duration) {
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// Instantly return on zero.
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if duration.as_nanos() == 0 {
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return;
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}
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// Calculate the register compare value.
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let frq = CNTFRQ_EL0.get();
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let x = match frq.checked_mul(duration.as_nanos() as u64) {
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#[allow(unused_imports)]
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None => {
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warn!("Spin duration too long, skipping");
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return;
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}
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Some(val) => val,
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};
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let tval = x / NS_PER_S;
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// Check if it is within supported bounds.
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let warn: Option<&str> = if tval == 0 {
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Some("smaller")
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// The upper 32 bits of CNTP_TVAL_EL0 are reserved.
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} else if tval > u32::max_value().into() {
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Some("bigger")
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} else {
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None
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};
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#[allow(unused_imports)]
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if let Some(w) = warn {
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warn!(
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"Spin duration {} than architecturally supported, skipping",
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w
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);
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return;
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}
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// Set the compare value register.
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CNTP_TVAL_EL0.set(tval);
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// Kick off the counting. // Disable timer interrupt.
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CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::SET);
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// ISTATUS will be '1' when cval ticks have passed. Busy-check it.
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while !CNTP_CTL_EL0.matches_all(CNTP_CTL_EL0::ISTATUS::SET) {}
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// Disable counting again.
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CNTP_CTL_EL0.modify(CNTP_CTL_EL0::ENABLE::CLEAR);
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}
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}
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